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PCBD-Nov2017

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46 The PCB Design Magazine • November 2017 As hand-held and portable electronic prod- ucts and their circuit boards continue to shrink in size, the designer is faced with solving the physical differences between traditional printed board fabrication and what's commonly referred to as high-density interconnect (HDI) process- ing. The primary driver for HDI is the increased complexity of the more advanced semiconduc- tor package technology. These differences can be greater than one order of magnitude in inter- connection density. Semiconductor Packaging Although the development of array-con- figured packaging for ICs has alleviated circuit routing difficulty somewhat, product minia- turization and performance goals are not easily achieved. To further complicate the PCB design process, many companies furnishing multiple die or multi-functional semiconductor pack- aging are forced to significantly increasing I/O while reducing both contact size and pitch. This higher I/O and finer pitch evolution is due in part to the OEM need for more capability in an ever-shrinking space. Further complicating tra- ditional PCB design, some companies are doing away with some or all traditional semiconduc- tor packaged semiconductors. System-in-package (SiP), for example, wheth- er die stack or package-on-package, has rapidly penetrated most major market segments. This includes consumer electronics, mobile, auto- motive, computing, networking, communica- tions, and medical electronics. The benefits of SiP will differ for various market segments but they can share some very common elements: shorter time to market, smaller size and lower cost. Area efficiency (more functionality in a single package footprint) has resulted in the strongest initial penetration in consumer elec- tronics. These mixed function SiP solutions have become commonplace in small form fac- tor systems, such as mobile phones, memory cards, and other portable electronics products and the number has been increasing rapidly. In contrast, it has become common for de- velopers to procure bare, uncased die elements that are configured for facedown (flip-chip) mounting. Although flip-chip was originally considered for relatively low I/O die, the redis- tribution of the peripheral located contact sites to a more uniform area array format has enabled Strategies for High-Density PCBs FEATURE COLUMN: DESIGNERS NOTEBOOK by Vern Solberg

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