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34 DESIGN007 MAGAZINE I APRIL 2018 • VQFN (very thin quad flat no-lead) • UQFN (ultrathin quad flat no-lead) • SON (small outline no-lead) • USON (ultra-thin small outline no-lead) • LLP (leadless lead-frame package) FNL construction consists of an IC die on an over-molded lead frame with or without a bot- tom thermal pad and with sawed or punched terminated solder bond pads exposed on the bottom. The pads are arranged along either two or four sides of the package in one to three rows. The small solder pads of these devices are configured to produce small, thin bottom terminated solder joints that combined with the small height of these devices results in a very low-profile package that makes them highly desirable for cell phone, tablets, and other portable electronics. However, FNLs are near-chip scale devices in which the silicon die dominates the package resulting in a low coefficient of thermal expan- sion for the package, typically in the range of 6-8 parts per million (ppm) per degree C. This results in a large CTE mismatch with the 14-17 ppm/˚C CTE of printed circuit boards that FNL ICs are soldered to. The CTE dif- ference combined with the thin solder joint results in high in-plane sheering angles dur- ing thermal cycling resulting in a sheering stress-strain relationship that reduces the num- ber of thermal cycles that can be endured before solder attachment fatigue failures occurs. When the temperature is elevated from the neutral state, the higher CTE of the PCB will cause it to expand more than the lower CTE component, and the sol - der joints will have a strain applied to them. The strain can be represented by the sheering angle produced in the solder joint due to the CTE mismatch, the tempera - ture change (delta T) the sol- der joint thickness, and the distance to the solder joint to neutral point. When the tem- perature is decreased from the neutral state, the PCB will contract more than the component and the solder joints will again have a strain applied to them. Any time the temperature changes, the solder joints are stretched one way or another. The solder joints at the components corners that are typically the furthest from the com - ponent's neutral point experience the greatest sheering strain which typically causes them to be the first to experience fatigue failure. In a typical automotive module board level reliability (BLR) thermal cycling test of -40˚C to 125˚C, the mean cycle life of QFN ICs (depend- ing on size is only 1000 to 3000 thermal cycles before solder fatigue failures occur). This is comparable to a mean thermal cycle life of over 10,000 thermal cycles for typical gull-wing, leaded-quad, fine-pitch (QFP) ICs used in auto- motive electronics and the 3,000 to 8,000 ther- mal cycles automotive ball grid array (BGA) ICs can endure. FNL ICs started appearing sparingly in automotive electronics 5-8 years ago many small QFNs such as those low power devices in packages sizes under 7x7 mm are not a concern, however their challenges will increase as higher power and larger versions are used. (Figure 1) 2. Large, Higher Power, Hotter-Running Integrated Circuits As vehicles with advanced telecom and AI autonomous capabilities start to appear, the large high-power BGA ICs these systems require Figure 1: Example of a solder thermal cycling fatigue failure in a QFN IC.

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