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Design007-Jun2018

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JUNE 2018 I DESIGN007 MAGAZINE 17 Shaughnessy: Is there any difference in how you run signal integrity and EMI simulation and analysis, other than having to just do it more than one time? What do you think? Wiens: I could answer that question a couple of different ways. Let's just look at a single board scenario. I'm only designing a single board system, and let's say I have an RF section on that board. Well, suddenly, I'm putting up via arrays around that section within the board. I'm putting a metal can on top of that section. I mean, you've seen an RF board, right? They look cool, like little walled cities. That's an example of EMI control on a single board. The same thing, you can imagine, happens on a multi-board scenario. One board radiates onto another, and if you've got two boards sand- wiched on top of each other, there's a lot of that going on between the two. But you use the same kind of isolation approaches to opti- mize it. It's the same thing with signal integrity. Sig- nal integrity is about a signal traversing from a driver through some kind of topology to a receiver. It's easy to think about on a single board. You've got a driver on one chip that goes through a package, comes out through the pin. It goes through traces on the board, maybe through some vias, pops up somewhere else, goes back up to another chip that receives the signal. Multi-board is just an extended topol- ogy. It starts bringing in things like connectors. That's why you have companies like Molex and Samtec selling expensive connectors that are optimized for performance, because high- speed signals traverse multiple boards. You need to be able to model that connector. Some of that gets into 3D electromagnet- ics to efficiently model what the connector looks like, and maybe you've got some cabling between boards. You've got to model that as well. Engineers have been able to manually model a multi-board system for quite a while – but it meant manually re-creating the topology model in a simulation environment—again breaking the digital thread and potentially introducing errors and delays. To try to auto- mate that process, using that 'A' word in EDA, means looking at the overall topology. We extract that topology automatically into Hyper- Lynx and build all those topology models for them so that they don't have to do it all manu- ally. That's something that we can do today in a multi-board environment. You asked about EMI and SI, and thermal is another case that's very common. We've got a technology called FloTHERM that's inte- grated within the flow. With FloTHERM, you can model at the chip level. You can model the chip inside a package. You can model that package on a board. You can model multiple boards inside an enclosure, and all the way up to that enclosure inside a room. Figure 4: Virtual prototype multi-board system for mechatronic behavior, signal/power/thermal performance and manufacturability.

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