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JULY 2018 I DESIGN007 MAGAZINE 55 the traces are 4 mil wide, 40 ohms impedance with a 4mil spacing. But, as the victim trace gets farther away from the aggressor the cross- talk decreases. Figure 4 shows the near and far end cross- talk for 4 mil wide, 40 ohms impedance traces with 8 mil spacing. The further the separation the less the crosstalk. But, as previously men- tioned, the total crosstalk on a victim trace is the accumulated noise injected from all nearby noise sources, so the result may be much more. In a microstrip configuration, the mutual capacitive coupling, between adjacent traces, is generally weaker than the mutually induc- tive coupling, driving the FEXT co-efficient negative as can be seen in the previous simu- lations. However, forward crosstalk does not exist in the stripline configuration. The fine balance between inductive and capacitive cou- pled crosstalk produces almost no observable forward crosstalk. Since the previous examples were of outer layer microstrip configurations, let's look at inner layer stripline crosstalk. Figure 5 shows the near-end crosstalk of a stripline construc- tion for 4 mil wide, 40 ohms impedance traces with a 4 mil spacing. Notice how there is no FEXT component of the noise. Also, the peak to peak amplitude of the crosstalk has been considerably reduced. So all other factors being equal, here is just another good reason why one should always route high-speed signals on the inner layers of a multilayer PCB. One factor that may have been overlooked in this methodology is the effect on the sig- nal of the transition from layer 1 to 3. At that point on the board, any power supply noise existing between the planes enters the memory bus circuit traces. This may be a major source of crosstalk, depending on the effectiveness of the power distribution network (PDN) decou- pling. Excessive PDN noise at the jump loca- tion could completely swamp out the differ- ences in crosstalk due to trace layout. This also presents another good reason why PDN analy- sis and optimization is so important. To evaluate crosstalk, I typically run a pre- liminary batch mode simulation in Mentor Figure 4: Near-end and far-end crosstalk for microstrip with 4/8 mil trace width/clearance.

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