Issue link: https://iconnect007.uberflip.com/i/1028393
70 DESIGN007 MAGAZINE I SEPTEMBER 2018 design that is based on tree components: inter- connect geometry adjustments + identified material models + validated software -> pre- dictable interconnects. With all three compo- nents in place, we were able to reliably predict behavior of most of the interconnect structures on EvR-1 board without additional tuning or calibration for 28-30 Gbps NRZ signal. How- ever, the analysis to measurement correlation was acceptable only up to about 5 GHz for the structure with the non-localized via. It makes it predictable for signals with only about 3-5 Gbps data rate. The TDR plot shown in Figure 5 reveals the large discrepancies in the mea- surements and the model at the location of the single via without the stitching vias. We can see some oscillations at the via location, which means that the via is coupled to a resonating cavity formed by parallel planes and multiple distant vias around the traces. To see how the coupling occurs, let's use the power-flow density visualization. The 1 V sig- nal source is connected to the microstrip port at the bottom of the board. Both microstrip and stripline ports are terminated with 50 ohm. As we can see, the power from the microstrip at the bottom does not go all the way to the stripline in the layer INNER1; some energy is radiated into the inter-plane areas as shown in Figure 6 for 5 GHz (peak values of the power- flow density). This model uses absorbing boundary condi- tions on the outside boundaries of the simu- lation domain; it absorbs the energy of the parallel plane waves going from the via. For instance, Figure 7 is a close-up of what is going on between reference planes GND7 and GND8—the power flows along the via in the anti-pad area and flows mostly outward between the parallel planes and is absorbed at the outer boundary. In reality, the energy injected into the inter- plane area does not completely disappear— it may be reflected from the fences formed by vias and returned back to the signal via in form of the oscillations observed on TDR above (coupled to cavities formed by distant stitching vias). Behavior of such vias can be predicted only in the post-layout analysis with either huge computational cost (large simu- lation area) or with simplified models of the whole board with substantial model accuracy degradation. The easier alternative is to local- ize it. The second via in this link was designed to test the effectiveness of placing two stitching Figure 5: A TDR plot shows discrepancies in measurements.