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70 SMT007 MAGAZINE I OCTOBER 2018 ment regulations, safety, and reducing over- all systems/replacement costs are important to satisfy the adoption rates. For these high reliability and lifetime require- ments, it is critical to have excellent assembly interconnect reliability to address the above needs. The role of interconnects in LED Level 1 (chip/die attach) and Level 2 (package on board attach) is fundamentally to: • Convey power and information efficiently and reliably over the rated life • Thermal management—get the heat out faster and reliably over the rated life. • Enable more light output, consistently, for longer time for the same package and system footprint. • Capable of being processed under robust processing conditions i.e. multiple reflow assembly. Voids, which are pockets of trapped gasses from solder flux, can cause issues for electric signals, can act as thermal resistors when heat dissipation is required, and they can also be the source of crack propagation and early fail- ure of an assembly. Figure 1 depicts large area voids in the bulk solder layer. The phenome- non of void occurrence is a complex system; there are many factors that drive various levels of voiding. Examples include: chemistry, reflow profile, volume of material, solderable pad finish and design of the component pads (thermal and electrical). For level 1 LED chip attach assemblies the use of traditional solders can be seen as an advan- tage from both ease of processing and cost. However, the importance for thermal manage- ment is critical for high and ultra-high power LEDs. The junction temperature in the LED increases with increasing drive current. Since more than 50 % of electrical input power is dissipated as heat due to efficiency droop at high drive currents in LEDs, this rise in the junction temperature reduces the light output by increas - ing the probability of non-radiative recombina- tion causing drop in efficiency and rated life- time. Therefore, the dissipated heat needs to be removed from the junction in order to maintain the light conversion efficiency and light output from the High Power LED package. The vari- ous components in the heat flow path in a High Power LED package are shown in Figure 2. Additionally, for Level 1, the requirements for processing LED packages with solder- based die attach on boards as a Level 2 assem- bly requires multiple soldering reflow capabil- ity. With multiple reflows of the same solder bulk layer, this may increase the levels of voids impacting the overall reliability of the stack at the Level 1 layer. For Level 2 package on-board assemblies LEDs are becoming more integrated with vari- Figure 1: Voids entrapment within the solder layer. Figure 2: High-power LED heat path.

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