Issue link: https://iconnect007.uberflip.com/i/1101604
68 DESIGN007 MAGAZINE I APRIL 2019 impedance of PCB trace adjacent to ground pour (i.e., impedance decreases when copper pour becomes closer to the PCB trace). As a result, the impedance mismatch contributes additional PCB loss to the transmission line at a high-frequency range. Analysis and Results To study the impact of copper pour on PCB channel loss in terms of insertion loss and impedance in terms of TDR, five models of 1" single-ended microstrip listed in Table 1 were created. The simulation topology is shown in Figure 2. For model 1A, a microstrip trace 5 mils wide and 1 oz. thick is laid out 2.65 mils above the reference plane insulated by low- loss dielectric substrate material. This trace is sandwiched between two ground traces on the same outer layer. The spacing between each adjacent ground trace and the signal trace is 1x the signal trace width. Meanwhile, the spacing between each ground and signal trace is set as 2x, 4x, 6x, and 8x for model 1B, 1C, 1D and 1E, respectively. The TDR plots depicted in Figure 3a indi- cates that microstrip experiences an imped- ance mismatch of 1 ohms when its distance from the adjacent ground at each side is set as 1x the trace width (model 1A). The imped- ance mismatch is getting smaller or closer to the nominal 50 ohms when the ground at each side is further away from the signal trace or beyond 2x the trace width. However, with reference to insertion loss plots depicted in Figure 3b, model 1A with adjacent ground-signal spacing of 1x the trace width encounters 1.5-dB channel loss at 10 GHz. When adjacent ground-signal spacing is increased to 2x the trace width, the channel loss is reduced by 0.75 dB. Beyond adjacent Figure 2: Single-ended microstrip model in Hyperlynx. Table 1: List of models for copper pour effect on PCB single-ended microstrip.