Issue link: https://iconnect007.uberflip.com/i/1174596
16 DESIGN007 MAGAZINE I OCTOBER 2019 layer looks like a centered stripline from the standpoint of the field and how they're con- tained. If you do that, then you can get an ac- curate impedance estimate based on what it's going to look like in the real world because it isn't a dual stripline. Creeden: And if you're crossing a slot of a split plane, that's a slight incident to an impedance. Hartley: That's a slight incident, but as long as the other plane is a solid plane, it's not going to create a problem. Creeden: Agreed, and that was my point; if the other side is an uninterrupted return path, you're good. But if the other side of the unin- terrupted return path is a split plane, and you ride adjacent to the split, your impedance will go up two levels, and you do not have the im- pedance you thought you did. Hartley: That's correct. I've seen people do that. Creeden: And they put asymmetrical stripline in. When you're routing out of a dense 2,000- pin ball grid array (BGA), there is no routing parallel on adjacent layers. You wagon-wheel pin escape and route broadside couple. And if one of them is the voltage layer, and three lay- ers down is a ground plane, all of the return paths will couple into one another, and you have a crosstalk nightmare. Holden: Isn't this happening due to the pow- er distribution network and how the IC people need lower voltages to keep their total power down? With smaller geometries, they can get by with lower drive voltage, but that lowers the whole noise margin. Hartley: Which means less noise will cause prob- lems than it would have before. As Lee Ritchey has said, "You should start with power integrity and distribution because if you get that wrong, it doesn't matter how you route the board." Creeden: Most of your CAD tools have some PDN software, and a lot of times, it's a DC drop, current-type profile, because it's never a full power plane; it's Swiss cheese because there are so many via holes through it and you need to look for the neck-down points where it's a fuse point. You see some high-current boards nowadays. Another big space we haven't touched on with the whole EV market is the battery and down-hole segments where you're talking about power delivery as the product it- self, not to a big CPU, but power delivery to battery-operated vehicles. Also, there are some new materials coming out that will hopefully address some of that and get into the Tg 400 and 200; they're geared toward high-voltage and good-cap stuff. You see that in the down-hole market where they're doing all of the drilling and where the thermal profiles are off the charts for these materials. Holden: I still believe that glass is going to be a useful substrate long-term, especially due to the liquid crystal display people and their au- tomation and handling of thin glass and things like that safely. We did a lot of experiments at Gentex with glass substrates since all of our mirrors are made out of glass. We can go down to four-micron lines and spaces pretty easi- ly with glass on huge panels, which is much more cost-efficient than a wafer is. Hartley: When you were down to four-micron lines, was that additive technology? Holden: Yes. We stuck indium tin oxide (ITO) on the glass for adhesion promotion, and since the ITO is conductive, we did a micron-based, semi- You should start with power integrity and distribution because if you get that wrong, it doesn't matter how you route the board.