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52 PCB007 MAGAZINE I OCTOBER 2019 high-volume smartphone market, there is an increased interest in the ability to design with feature sizes below 75 microns and, along with that, there is an increased interest in what options are available in low-volume and development quantities to achieve this. While working with the SMTA to help develop a new conference launching this fall, "Additive Electronics: PCB Scale to IC Scale," it has be - come clear that the industry is at an inflection point. Increasingly sophisticated electronics in smaller and lighter-weight packaging will continue to drive the need to deliver finer fea- ture sizes, leaving designers with the need to identify potential solutions and provide fab- ricators with the opportunity to bring in new capabilities to meet this need. One of the forerunners in this technology advancement is Averatek's A-SAP process. Av- eratek has created a liquid metal ink (LMI) and semi-additive manufacturing processes that are capable of achieving feature sizes from 75 down to 5 microns. This technology is available for license to PCB facilities and fits well with traditional PCB manufacturing equipment. Currently, the A-SAP process is being piloted in two PCB fabrication facilities and will be commercially available over the next few months. There are several benefits to the semi-addi- tive process; the most obvious is line width and space. In traditional subtractive etch pro- cessing, when feature sizes push below 75 mi- crons, there are significantly decreased yields along with significantly increased cost per part. With additive processing, not only is a 50-mi- cron line width and space now achievable, but feature sizes can also design below 25 microns before pushing fabrication capabilities. These additive technologies open design possibilities in several ways, such as the size. The overall form factor can be shrunk considerably, and this technology is finding use in things like hearing-aid applications, neural probes and catheters. Mastering complex pinouts is another sig- nificant benefit. Routing 0.3-mm-pitch and 0.2-mm-pitch devices can be accomplished without the need for costly multiple lamina- tion cycles and with a reduced layer count when compared to traditional subtractive etch processing. Imagine moving from a 12-layer, 3-lamination stackup to an 8-layer design re- quiring only one lamination cycle by swapping out four traditional layers for ultra-high den- sity layers and incorporating those with tradi- tional subtractive etched layers. Not all applications require smaller, lighter- weight packages. This additive technology al- so lends itself to the ability to add additional electronics into a fixed space. Imagine adding additional electronics and functionality in an automobile. As this technology develops with our low- volume manufacturers, there will be many more options available for designers chal- lenged with space and weight constraints. At this point, there is a lot of brainstorming and creative thinking being done as to how to best take advantage of these added capabilities. It is clear that over the next several years, this technology will find space alongside both sub- tractive etch fabrication methods and IC fabri- cation techniques. PCB007 CLICK HERE to attend the Additive Conference on October 24, 2019. Tara Dunn is the president of Omni PCB, a manufacturer's rep firm specializing in the PCB industry. To read past columns or contact Dunn, click here. Increasingly sophisticated electronics in smaller and lighter-weight packaging will continue to drive the need to deliver finer feature sizes...