Design007 Magazine


Issue link:

Contents of this Issue


Page 33 of 123

34 DESIGN007 MAGAZINE I AUGUST 2020 Be Aware of Default Values in Circuit Simulators Simulators are very convenient for getting quick answers without lengthy, expensive, and time-consuming measurements. Simu- lators range from simple spreadsheet-based illustration tools [1] to very sophisticated 3D field solvers [2] . Somewhere in the middle, we have the generic circuit simulators—the most well-known among them being SPICE. Berke- ley SPICE has been the grand-daddy of all SPICE tools [3] , and these days, there are many professional SPICE variants available. These tools have been around for a long time, and we usually take the validity of their output for granted. While the tools may be bug-free, no tool can give us perfect answers for just any arbitrary numerical input; sometimes, we can be surprised if we forget about the numerical limits and the limitations imposed by internal default values. As an example, I will show a few simulation results on a simple ladder-like power distribu- tion network, all done with the free LTspice simulator [4] from Linear Technologies, now part of Analog Devices. Figure 1 shows the schematic diagram of a simplified ladder model of a point-of-load power distribution network (PDN). The PDN is represented by four cascaded blocks. On the left is an ideal voltage source with series resis- tance and inductance modeling the DC source. To its right is a PI model of the PCB with plane resistance and inductance, as well as bulk and ceramic capacitors. The next block describes the package with its series resistance, inductance, and capaci- tance. The 10-μF capacitance value suggests that this is not only the static capacitance of the package planes, but it also represents package capacitors. The last block on the right describes the die with a series RL term, a paral- lel capacitance, and a parallel load resistance, which is determined by the nominal voltage and the average power consumption. Outside of these blocks is a 1A AC current source injecting test current into the silicon node. Since all elements are linear and time- invariant models, the actual current value does not matter, but the 1A value is convenient Quiet Power by Istvan Novak, SAMTEC Figure 1: LTspice schematics of a simple PDN.

Articles in this issue

Archives of this issue

view archives of Design007 Magazine - Design007-Aug2020