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54 DESIGN007 MAGAZINE I OCTOBER 2020 The OODA loop can be applied to the PCB design process when screening and fixing problems. PCB design requires filtering the available information, sorting and putting that information into context, and then acting with better information. Cadence has continued to invest in the area of modern system design and analysis to cover all facets of the PCB design process, such as the newly introduced Sigrity Aurora flow. Sigrity Aurora is designed with the goal of raising up a generation of electrically-aware PCB designers. It is an enablement tool with dedicated workflows to screen PCB boards in the signal integrity (SI) and power integrity (PI) domains. Shortening the design cycle time means shortening the OODA loop and reduc- ing the friction of design changes in the light of analysis feedback. A user goes through the OODA loop in the PCB design process by first observing the PCB for various failure constraints by simulation or electrical rule checks with the Sigrity Aurora flow. Once the workflow is selected, and nets run, the tool orients the user with the Allegro canvas overlay and sortable tables of data. This enables designers to screen a large amount of data in massive designs. In many cases, the entire board cannot be manually screened, and items may be missed, such as a reset line being coupled to a noisy aggressor that could cause a fatal system reset. In screening the design for potential SI and PI prob- lems, users bring issues to the forefront of the design cycle before issues are found at signoff or in the lab. When new interfaces are used, the focus often shifts away from lower-speed nets and the system itself. Issues can fall through the cracks, and designers may miss overlooked nets. Expensive rework late in the design cycle causes design slippage and board re-spins. By expanding the surface area of analysis cover- age, fewer cycles are used fixing problems later in the design cycle. Cadence is also investing in the area of design feasibility analysis. The OODA loop of the design process can be augmented in the feasibility stage as well. The users can pre-plan topologies and explore the design space by sweeping parameters like trace length. Once the variables are explored, users can simulate drive strength and define constraints for successful routing. Designers can experiment in a sandbox to assess placement and stackup changes on SI and PI problems without a schematic. Cadence will continue to invest in and enhance the PCB design flow, now and into the future. The crossroads of physics, mechanical design, and electrical engineering culminate in the art of PCB design, and the next generation of PCB designers will have to be more electri- cally-aware than ever before. DESIGN007 Michael Nopp is a lead product engineer at Cadence Design Systems.

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