22 DESIGN007 MAGAZINE I OCTOBER 2020
Edge plating, as the name suggests, is the
process of plating the edges around the PCB.
I first saw this technique used at NEC back
in 1994. This is an elegant (but expensive)
solution to prevent emissions from extremely
high-speed SERDES signals on terabit routers,
etc. but is an overkill for a typical high-speed
design.
Another way to mitigate this problem is to
create a via fence stitched to ground around the
perimeter of the PCB. If the spacing between
the stitching vias is less than or equal to one-
eighth of a wavelength, the via fencing will
appear as a short circuit, causing the propa-
gating wave to be reflected back to the source
rather than being launched from the PCB edge.
A post-production solution is to employ cav-
ity resonance absorber material applied along
the edge of the PCB, which dissipates the
edge radiation from the PCB without using
additional board real estate. It also reduces
the possibility of board resonance problems
by dissipating the energy and not reflecting
the energy back into the interior of the board.
However, it is always best to fix the problem at
the source rather than applying as a quick fix
after production.
Key Points
• Fringing is the bending of the electric
flux lines near the edge of the parallel
plate capacitors.
• A signal passing through a plane cavity
may intensify fringing fields.
• As core voltages drop, noise margins
become tighter.
• Signals passing through a plane cavity
inject propagating waves, which can
excite the cavity resonances.
• When the wave meets the PCB edge, the
two reference planes form a slot antenna
and will radiate noise.
• The cavity noise propagates as standing
waves spreading across the entire plane
pair.
• When the cavity has open end boundary
conditions, resonances arise when a
multiple of half wavelengths can fit
between the ends of the cavity.
• Return current tends to couple to the
signal conductor, falling off in intensity
with the square of increased distance.
• Avoid positioning critical signals close to
the edge of the board.
• Edge plating is an elegant (but expensive)
solution to prevent emissions from
extremely high-speed SERDES signals.
• GND stitching vias are placed at
one-eighth of a wavelength as a short
circuit, causing the propagating wave to
be reflected back to the source.
• Edge radiation should be eliminated at
the source. DESIGN007
Further Reading
• Barry Olney, "Beyond Design: Plane Cavity
Resonance," The PCB Design Magazine,
September 2017.
• Barry Olney, "Beyond Design: Mythbusting—
There AreNo One-Way Trips!" The PCB Design
Magazine, April 2014.
• Barry Olney, "Beyond Design: The 10 Fundamental
Rules of High-Speed PCB Design, Part 3,"
Design007 Magazine, November 2018.
• Basu (VU2NSB), "Solar Activity and Ionosphere,"
VU2NSB, November 19, 2019.
• Arturo Mediano, "Avoid Critical Signals in Edges of
the PCB" In Compliance, December 27, 2018.
• Bert Simonovich, "Controlling Electromagnetic
Emissions From PCB Edges in Backplanes,"
Signal Integrity Journal, January 18, 2017.
• Mast Technologies, "Reducing PCB Edge Fringing."
• Larry D. Smith and Eric Bogatin, Principles of Power
Integrity for PDN Design—Simplified, Pearson,
March 2017.
• Eric Bogatin, "What is the resonant frequency of a
cavity? Rule of Thumb #30," EDN, July 19, 2016.
Barry Olney is managing director
of In-Circuit Design Pty Ltd (iCD),
Australia, a PCB design service
bureau that specializes in board-level
simulation. The company developed
the iCD Design Integrity software
incorporating the iCD Stackup, PDN, and CPW Planner.
The software can be downloaded at icd.com.au.
To read past columns or contact Olney, click here.
