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PCB007-Nov2020

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48 PCB007 MAGAZINE I NOVEMBER 2020 space can also be the reason why an extended stacked vias solution is chosen. In certain situations, there may be up to three copper platings on some layers. This is related to conditions such as copper filling of laser vias, overplating of mechanically drilled vias, and the plating of through-holes. This can create challenges for the subsequent etch- ing of narrow conductors, which is a concern with HDI PCBs today. IPC Standards The amount of copper plated in the various holes is, in most cases, specified in IPC stan- dards that PCB manufacturers and end custom- ers adhere to. You get a full overview—includ- ing the complete standards, tables, and illus- trations—on IPC's website, but here are some values from IPC-6012E (Tables 2 through 5). How to Avoid Layout Rejections Every week, we receive many layouts that are rejected long before they end up in PCB Figure 2b: 14-layer stackup, example 2. Figure 2c: 14-layer stackup, example 3. Figure 2a: 14-layer stackup, example 1.

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