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82 PCB007 MAGAZINE I NOVEMBER 2020 the middle of the panel plate higher than pads closer of the pattern edge, where approximate- ly one-half inch of laminate copper is left ex- posed for connectivity. It is not uncommon to planarize the surface of the plated vias after re- sist strip. Panel plate is more uniform in sur- face thickness from pad to pad. However, the added thickness of the plated copper poses its own challenges at etching. 3. Plating Chemistry The plating chemistry for blind via plating is dramatically different from through-hole chem- istry. Here, the electrolyte is based on high cop- per concentration coupled with low acid. The organic additives are a different combination of brightener, carrier, and leveler with empha- sis on the role of the leveling component that plays a key role in keeping the edges of the via (the knee) from overplating, closing the via be- fore complete filling, resulting in a void. 4. Plating Cell Setup The plating cell setup must be optimized for via fill. This includes anode/cathode spacing, as well as the number and placement of the anodes. This has a direct impact on thickness distribution and uniformity. 5. Agitation Solution agitation must be designed to en- sure the delivery of the different organic/ad- ditive components where they are most effec- tive. Solution agitation may be achieved with air sparging or eductor mixing. Air sparging initiates from the bottom of the cell and is in- tended to move solution across the surface for the cathode. Eductors may be placed horizon- tally in the bottom of the tank or on vertical manifolds. In the former, the flow is laminar to the panel, and the latter offers direct verti- cal impingement. The number of nozzles and their location must be designed to achieve the desired outcome. 6. Rectification DC plating of blind vias must be designed for hole filling. It is usually lower current density and longer time than through-hole plating. To improve productivity, the plating ASF may be increased with the filling progression. Common Defects in Electroplated Blind Vias Separation at the interface of the filled via and the catch pad may occur during IST ther- mal cycling. This is more common in stacked vias as compared to staggered vias. In a stacked via configuration, the Z-axis expansion and contraction are cumulative to the whole stack and may cause separation at the weakest catch pad interface. In a staggered configuration, al- though Z-axis expansion/contraction does oc- cur, it is not cumulative and has a much bet- ter chance for continuity. A staggered config- uration is proven to be more reliable than the stacked one. Platig voids could also occur during via fill- ing. This is a result of via closure prior to com- plete filling. This is corrected by optimizing the leveling effect of the electrolyte, which in- volves the leveler additive concentration and its delivery at the surface through solution ag- itation. A dimple (a dish down on the surface of the filled via) may occur. It is a sign of incomplete filling and is corrected by modifying the plat- ing cycle or by plating more copper. Dimples are eliminated during the planarization step. Conclusion A lot goes into setting up electroplating for through-hole or for blind via plating. The key is optimizing the existing equipment to the parts that are being produced. Revisiting and reoptimizing the plating process must be peri- odically examined and updated as the product mix evolves. PCB007 George Milad is the national accounts manager for technology at Uyemura. To read past columns or contact Milad, click here.