Issue link: https://iconnect007.uberflip.com/i/1315894
DECEMBER 2020 I DESIGN007 MAGAZINE 55 be up to 3% different from what is available; hence, the impedance will vary by 3%. Incor- rect impedance creates reflections that lead to downstream SI, crosstalk, and radiation issues. The design of the PDN is also a very impor- tant part of the conceptual design process, ensuring that you have a stable power delivery system before you even start placing a chip on the board. Decoupling and bypass capacitors supply instantaneous current at different frequen- cies to the drivers until the power supply can respond. In other words, it takes a finite time for the current to flow from the power sup- ply circuit (whether on-board or remote) due to the inductance of the trace and/or leads to the drivers. Decoupling capacitors also lower the impedance at different frequencies to help meet the AC impedance target. Every decoupling capacitor has an equivalent series inductance (ESL) and mounting induc- tance that causes its impedance to increase at high frequencies. To reduce this inductance as much as possible, several small value decaps should be spread throughout the PDN. These decaps interact to create anti-resonance peaks but should work together to lower the AC impedance. This is a trial-and-error process and needs to be done with the assistance of a PDN analysis tool (Figure 2). A post-layout simulation requires the trans- lation of the design files so that they can be read into the simulator. The simulation soft- ware should interface to all major EDA PCB design packages. However, if you have a simu- lation tool that is built into the PCB design software, then critical signals can be readily simulated by extracting the topology into the simulation environment. This creates a free- form schematic of the transmission lines, including drivers, microstrip and stripline modules, vias, and loads. A batch mode simulation identifies possible SI, crosstalk, and EMC violations. Interactive simulation is then used to further analyze these potential issues. Crosstalk is typically picked up on long parallel trace segments. These can be on the same layer, as in Figure 3, but may also be broadside coupled from the adjacent signal layer. It is for this reason that orthogonal rout- ing is recommended on adjacent signal layers (between planes) to minimize the coupling area. Figure 2: Optimized DDR3 PDN (iCD PDN Planner).