Issue link: https://iconnect007.uberflip.com/i/1359517
APRIL 2021 I DESIGN007 MAGAZINE 25 volume production. ree, what happens when a mistake gets made while copying the reference design? Signal integrity issues can be notoriously difficult to debug in the lab— simply probing a marginal signal can be enough to change its behavior. What happens if you have a low-cost, high-volume consumer design that's failing intermittently in the lab? Shaughnessy: How do you convince people to use simulation in the first place? At DesignCon, a moderator will ask who uses simulation, and three hands might go up. Is it that due to time to market? Westerhoff: Let's start with why people simu- late. I'll give you my list of five reasons why people get started with simulation. 1. ere's no other path forward. When I'm designing a new chip with a new package, there are no pre-existing guidelines or rules. It might be a standardized interface, but the IC layout is new, and the package is new, so I know full well that everything won't just come together by itself. I'm going to have to model everything and prove that it works before anything gets built. at's how we designed ASICs in my past; we proved we had a working board-level solution before the chip is taped out. 2. People start simulating because they're having lab failures that affect project sched- ules and costs. I'm not talking about incon- venience; I'm talking about real impacts. One Let's take a step back: What's the most important question when I'm designing some- thing? Nolan Johnson: Does it work? Westerhoff: Bingo! e details get complicated but the question is simple: Will our design work, and by how much? How much margin do I have available to make design trade-offs that reduce manufacturing cost, or whatever? Johnson: Are you talking about something like digital simulation? Is the logic of my schematic going to behave the way I expect it to? Are you looking at the behavior of your schematic at a logical level? Westerhoff: Great question, but I'm talking about something different. Logic simulation is about making sure my design creates the right logical 1's and 0's, that it has the correct logi- cal function. at's a binary problem: it either works correctly or it doesn't. Signal integrity is about the analog behavior of digital signals— whether they achieve the right voltages at the right times to ensure that signals are received (sampled) correctly. at means we can have margin—the degree by which a signal's voltage exceeds a minimum voltage and timing needed for reliable operation. We want to have enough margin to be reliable but not so much that the design becomes cost-ineffective, since increas- ing margin tends to increase the cost of pro- ducing the design. Oen people will say, "Just take the vendor's reference design and copy it." at works, but with drawbacks, because reference designs tend to be conservative, for good reasons. One, they're the first board built for that particular IC, so nobody knows where they can cut the corners yet. Two, the IC vendor absolutely wants to prove the chip is reliable and they're not trying to manufacture the reference design in volume. So, what's cost-effective for a ref- erence design may not be cost-effective for Signal integrity issues can be notoriously difficult to debug in the lab— simply probing a marginal signal can be enough to change its behavior.