Issue link: https://iconnect007.uberflip.com/i/1369942
16 DESIGN007 MAGAZINE I MAY 2021 Hartley: I agree, no doubt about it. With the first DDR3 design we did, I realized we could do fly-by routing. What a blessing; that made life so much easier. And I've never done DDR4, so I don't know this for sure, but doesn't it sig- nal the receiver that certain bytes upon receive have to be launched high? Olney: I don't really get into that side of it, that's more the firmware of the chips, but I believe it does do that. Hartley: e advantage is that you don't have a drain on the power bus. e instantaneous L(di/dt) drops in the power bus can lead to switching noise. If you're not switching as many lines at once from the driver, this won't happen. Olney: Exactly, that was the idea of fly-by to start with so that all the signals weren't clocked at the same time. ere's not as much simulta- neous switching noise. Shaughnessy: We get a lot of views on any arti- cle with DDR in the title. In our surveys with designers, they say they're having a hell of a time with DDR. You both have said in the past that DDR isn't really that difficult if you just follow the process, so why do so many design- ers and engineers have trouble with it? Olney: I think it's uncertainty. ey're not sure if it will work and they don't have simulation tools to confirm it, so it's up in the air. ey hope it works, but they're not sure. Hartley: at's a very good point. I think you hit the nail on the head. Lee Ritchey has a term called "design by fear." A lot of people aren't sure, so they take the worst possible case and figure, "I had better do this just to make sure it's going to work." Olney: e main issue that I see with DDR routing is that people don't choose the right impedance. DDR3 needs to be routed to 40 ohms single-ended and 80 ohms differen- tial impedance. A lot of people still route to 50/100 ohms single-ended/differential. ey just can't get in their heads that it's 40 ohms and 80 ohms. at's all to match the drivers. e drivers are normally 34 ohms. ey have the wrong impedance to start with, which gives them more reflections. If you are rout- ing to 50/100 ohms, you are going to get more reflections coming back. Data lanes must be routed on the same layer, generally the strip- line layer. All the data lanes can be routed on one embedded stripline layer if the pinout of the FPGA is correct. e pin assignments should facilitate routing. You can order them so that the routing can just flow out and into the memory chips then the data with the strobe can be routed in each byte line out to the memory chips on one layer. en, the fly-by—the address—can go on that same layer because the address lines are on the other side of the memory chips away from the FPGA. You need to break out from the FPGA with two layers of the address and clock and take it around to where the fly-by traces come through; then they can branch down to the same layer as the data. You only need two layers to route it on. Matties: is might be kind of a silly question, but isn't all this available on Google? I Googled DDR and the first thing that came up was that the clock needs to be longer. It needs to arrive aer the data. Olney: Google is smart but not always right. With the first DDR3 design we did, I realized we could do fly-by routing. What a blessing; that made life so much easier.