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MAY 2021 I DESIGN007 MAGAZINE 79 I once created roughly 20 reuse blocks of known validated circuits to include their respective layouts. e reuse blocks consisted of a completed schematic and its associated completed design layout. e reuse blocks ranged from a simple circuit design of 10 to 50 components, to a complex multiple sheet schematic consisting of roughly 500 or more components. ese blocks were managed effi- ciently and effectively within the EDM library. In general, using a reuse block in a design is treated no differently than the way you would use a typical resistor symbol and its associ- ated land pattern in the same design. e reuse blocks are connected from block to block and other circuitry by their respective ports, in the same manner as you would connect resistors, caps, and other ICs in your design. From these initial 20 reuse blocks, the final design ended with about 120 reuse blocks by replicating respective reuse blocks within the main design as required to meet the final requirements of the CCA. By using this reuse approach, we cut about three to four weeks out of the upfront engineering and layout design cycle time as well eliminated about two weeks of backend lab testing time during the CCA bring-up and testing phase of the project. In dated, certified, and known CCA design. Its respective circuitry and layout have been cap- tured and managed. is is not a "copy circuit" function; it's way more than that! is known circuitry and layout is then reused in three separate PCB designs, saving the respective printed circuit engineer time from having to re-layout that same specific circuity. It also saves engineering time—both in the upfront engineering, which creates cir- cuitry, and in the backend during the CCA bring-up testing phase. Your potential for suc- cess is much higher since the individual blocks are already known to work and are already val- idated. is is where you see the most signifi- cant cost savings, not to mention the potential of eliminating the need for a PCB re-spin. Some of today's EDA tools can create and utilize reusable PCB design IP by using reuse blocks. ese blocks can be managed within your library for total revision control and export content control as well. In Figure 3, we see an example of a managed block use case. Here is an example, using this approach, of how I recently addressed my original question (How can we design faster and better while cutting cost?) on a recent hardware design reuse project. Figure 3: Example of managed block use cases using Xpedition and EDM.

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