Issue link: https://iconnect007.uberflip.com/i/1369942
28 DESIGN007 MAGAZINE I MAY 2021 planes are three layers apart. Any PDN tran- sients will tend to cross couple to the two signal layers in between. Similarly, few of the signal layers have an adjacent return plane, therefore, the propagating wave return path will jump all over to whatever is the closest metal on the way back to the source. Again, this will tend to couple clock noise throughout the board. A better design is shown in Figure 6. Here, we lose one signal layer, but we see the power and power return planes are adjacent, while each signal layer has an adjacent signal (or power) return plane. It's also a good idea to run multiple connecting vias between the two return planes in order to guarantee the lowest impedance path back to the source. e EMI performance will be significantly improved using this, or similar designs. In many cases, simply rearranging the stack-up is enough to pass emissions. Note that when running signals between the top and bottom layers, you'll need to include "stitching" vias between the return planes and stitching capacitors between the power and power return planes right at the point of signal penetration in order to minimize the return Figure 5: A six-layer board stackup with very poor EMI performance. Figure 6: A six-layer board stackup with good EMI performance. Each signal layer has an adjacent return plane, and the power and power return planes are adjacent.