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SEPTEMBER 2021 I DESIGN007 MAGAZINE 35 power and ground planes and have excellent stability of dielectric constant and dielectric loss up to 15 GHz. e thinner layers of ECM also significantly reduce the capacitor mount- ing inductance. ese ultra-thin laminates allow a signifi- cant layer count reduction in PCBs with bet- ter signal performance. Having a low dielectric constant, combined with very high withstand- ing voltage, these glass-free films change the design rules for a given via diameter and trace width, while still conforming to the manufac- turing needs of the PCB fabricator. Several technology trends are also enabling denser PDN design. For instance, increasing the converter switching frequency reduces the size of the PDN but is less efficient—produc- ing more heat. Also, decoupling capacitors are tending to be smaller so they can be placed in closer proximity to the load and minimize the parasitic loop inductance. But, this means they need to be of higher quality to withstand the heat. ese capacitors have low equivalent series resistance and inductance and take less mounting space which results in lower overall loop inductance. When you cannot shrink the traditional PDN any further, it may be time to take a new approach involving switched tank converters. Traditionally, we use switched capacitor con- verters to step down the source voltage, how- ever these require large banks of capacitors. Switched tank converters use resonant tanks which require much less space, so it is possible to put the power delivery devices much closer to the processor core. is enables faster power switching to accommodate changes in consumption of the core. One of the best ways to lower design costs is to minimize respins of the board. Simulation is the key to resolving trade-offs. And, simu- lation allows the designer to perform what-if analysis of the PDN before the board assem- bly is produced. e AC impedance curve is a summation of all of the effects of the power source that you choose: bulk bypass capaci- tors, high-frequency decoupling capacitors, mounting inductance, the PCB substrate stackup, and the IC package. So it is impera- tive to be able to extract the plane data from the stackup and import the information into the PDN profile (Figure 2). is allows one Figure 2: Plane data is extracted from the stackup to build the plane definition of the PDN. (Source: iCD Design Integrity)