Issue link: https://iconnect007.uberflip.com/i/1419905
74 PCB007 MAGAZINE I OCTOBER 2021 slots. Aer curing, next is the important Step 5 where cross-routes create the vertical inter- connects. If vertical traces are going to be used, Step 6, drill/rout out the back-rout (BR) slots. en selected vias and slots are resin-filled and cured. In Steps 7 and 8, for pattern plating, the normal process resumes of imaging, plating, stripping and final etching. In the final panel, the board would be solder masked, with any final finishes and fabrication. Design Rules To illustrate various routing densities, we like to illustrate 0.7 mm pitch because VeCS has a 600% increase over through-hole while HDI has only a 200% improvement. e cross-rout or CR step is also com- pleted. Clearly you can see the glass dielectric removed between the VeCS circuits. is elim- inates glass influence for issues like CAF 4 . VeCS-2 design details: e middle part (conductive material) is removed to create two different potentials to the le and right of the slot. Not every position in the slot needs to be processed in this way as it depends on the design. is design method for VeCS is another example of creative concepts. e VeCS-1 with back rout or VeCS-2 differential signals are routed and surrounded by a "racetrack" type ground reference. is nearly creates a com- plete Faraday Cage for the connections. e SI performance is beneficial for speeds above 10Ghz. Details of the 0.5 mm pitch VeCS breakout using standard VeCS design rules are in refer- enced in Table 1. Routing will depend on cross- rout slot dimensions. But remember: HDI can only go one or two layers down, while VeCS can go three times deeper. A complete set of design guidelines for VeCS-1 and VeCS-2 (Table 1) are broken down into standard, advanced, and in R&D. Addi- tional design illustrations and advice, includ- ing tool setups are in the August 2019 issue of PCB007 Magazine 5 . Figure 5: The VeCS fabrication eight-step process 8 . (Source: NextGIn)