Issue link: https://iconnect007.uberflip.com/i/1419905
76 PCB007 MAGAZINE I OCTOBER 2021 Videos that show the routing of VeCS struc- tures on various EDA tools like Siemens/Men- tor, Cadence, Zuken, and Altium are available by contacting NextGIn Technologies. Electrical Performance Electrical performance is another area (besides CapEx and costs) where VeCS outper- forms plated through-hole and HDI. e ver- tical trace does not have the capacitance and inductance of a via. For extremely high-speed logic, the ability to create shielded differen- tial pairs with minimum distortion is unique. As seen in Figure 7, experimentation was con- ducted to tune vertical traces in the slot such that there is almost no reflection/dispersion. BestPCB compared simulated vs. actual prod- uct measurements. Additional figures show the simulated tuning of a TDR response on VeCS-2 where we can vary it from a capacitance to an inductance response or make it as "flat" as pos- sible on the NextGIn website. Modeling with Simbeor has determined the best performing layer transition. Can we use VeCS to make layer transitions and re-intro- duce Manhattan routing? First results look interesting. Manhattan/VeCS routing is an Figure 6: Recommendations for VeCS design rules from Table 1. (Source: NextGIn)