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NOVEMBER 2021 I DESIGN007 MAGAZINE 41 OEM comes to us. If both the OEM and EMS provider are using the tool, it's a great shar- ing of data. You also touched on where we fit in the design world. Typically, we sell into test groups, test engineers, and that realm, but we also have started our initial talks with the design engineers, and with the quality teams. All these groups have a potential interest in a tool like TestWay. Shaughnessy: PCB designers don't mention DFT very oen. What are some of the most common problems that you wish designers would do or stop doing? What advice would you give designers? Webb: e typical problem is usually that they don't know how you're going to test their board, and what strategies will be used. Maybe they don't understand that you're going to test the board with boundary scan, for example. e designers may go right into the layout phase and put test points where they think they can get them in. If they don't have that understanding of how you're going to test the board and the methodologies you're going to use, they may go off and not really understand the best locations and need for the test points. Of course, these days everybody is dealing with shrinking boards, so real estate is always at a premium, and nobody generally has 100% test point access anyway. But there are other test methods being used today that don't need as much access. We have customers who are doing more flying probe testing than ICT. Flying probes are getting more accurate and faster. Again, this means you may not need a test point if you're going to probe a compo- nent pad or something like that. It's just that lack of communication between the designer and the test guys that can lead to issues. If these groups can work more closely together, which a tool like TestWay allows them to do, they will ultimately achieve a more testable design with better coverage and less cost to produce. Johnson: Realistically, where in the design pro- cess should the testing methods be defined? It sounds like the specifics need to be figured out before you start doing layout. Webb: at's absolutely correct. Most of the time, when people talk about DFT they instantly think about layout and accessibility, but there's a lot you can do while looking at the design early on before layout. at was the key point that ASTER did initially before we started working with test coverage and all the other modules that we now offer. You should start very early in the process. e test guy should be looking at the analy- sis when schematic capture is in process, and that's when you can make some big impact on testability. If you give quick feedback to the designer and say, "Oh, don't do it that way, do it this way," you will have a more testable board that works well. Johnson: ere are plenty of CAD tools out there, plenty of environments and workflows that get put together by an OEM or an EMS provider. How agnostic are you? Webb: We can import almost any industry stan- dard schematic net list file. at's a file that's available before layout. And it's the same with the layout files—whether it's ODB++, PADS, Zuken, Altium, or whatever, pretty much all Most of the time, when people talk about DFT they instantly think about lay- out and accessibility, but there's a lot you can do while looking at the design early on before layout.

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