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52 PCB007 MAGAZINE I NOVEMBER 2021 Feature Article by William Webb ASTER TECHNOLOGIES Achieving design for test (DFT) can be chal- lenging for both design and test groups as sometimes both expect that the other will be the one to manage DFT. e design and test groups might be in the same organization, or they could be an OEM vs. an EMS company. It works best if both the design and test groups are engaged in the process of DFT and trying to achieve the goal of the best test coverage and lowest rate of field returns. Traditionally, design and test have operated in silos where there was not always the best communication, and at some point, the design was given to the test department to perform DFT. Oen, due to project timelines and peo- ple working in different geographic regions, this means if some DFT concern was found, it may have been too late to address and resolve the issue. It is too late to wait until a board has gone through layout to begin DFT, as this needs to happen at the time of schematic cap- ture, when the logic design is taking place, and before the board has gone for routing and lay- out. ere are critical items that can be exam- ined at the schematic capture phase to ensure that the board will be as testable as possible. A continuous feedback loop into DFT and test coverage understanding is key to producing defect-free products at a minimum cost. Companies must deliver good products to their customers, defect-free and at minimum cost. e challenge is how to detect or pre- vent defects from occurring so that only good Design to Production Flow: DFT and Test Coverage Using Industry 4.0 Principles to Produce Good Products Figure 2: EMS 4.0 workflow: Improved decision-making, faster time-to-market, cheaper and better quality. Lean design, test and manufacturing deliver defect-free products at lower cost. Figure 1: Traditional workflow: Longer, more expensive and obsolete.

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