Issue link: https://iconnect007.uberflip.com/i/1428512
14 PCB007 MAGAZINE I NOVEMBER 2021 You would have to create a test pass one and a test pass two which gives you 100% coverage, but the drawback is time. Instead of four hours in tests, now we need a day as each board needs two passes because they are not designed to test quickly. Meanwhile, downstream pro- cesses want the board "right now." If designers want a signature analysis from a buried resistive value in an innerlayer, they need to port that signal on the surface of the board where it's accessible. Otherwise, it either must be tested at the innerlayer level or sub-part level, which then increases the cycle time of manufacturing. If they put an IO to it on the outside of the board, it can all be tested at final, which can be a very good time saver, but the drawback is that when you wait until the end and you have a problem with a buried network or something similar, you can't fix it. Shaughnessy: Are you seeing AI in the tools? Do you think it's going to have a bigger role in test and inspection? Kolmodin: I see it with robotics—load, unload, things like that. But I think there's a place for that in there. It's still rudimentary, but the way our flying probers measure and remember— it's not so much a science-fiction world any- more. It's not just the PCB industry, but other industries also going in that direction. I do see a place for it in the future. Holden: Have you seen more requests for high voltage, especially where we're thinking about the automotive prototypes in electric vehicles in which the boards are going to be under 800 volts or higher? Kolmodin: Yes. e military has a high-volt- age test which represents much of their power supply stuff. We see insulation resistance test which is basically a high-voltage test on certain networks or planes on the board. It's usually high-voltage networks. It's similar to HiPot, but not the same. HiPot test applies a voltage, ramps it up to 500 to 1,000 V or higher, then holds it at that voltage and looks for leaks. Insulation resistance test is where we look at two planes, maybe two net- works, and we do the same thing. We ramp it up to 500 or 1,000 V, or we see 3,000. It's doing the same thing—holding that voltage high— but it's also making sure that the insulative resistance between the two networks is at a value or higher, just like an isolation test in cir- cuits. It's just a very high-voltage isolation test called IR. If you had asked me the same ques- tion five years ago, I would have said we don't see that too much, but we are seeing it now. HiPot has always been around, but this high- voltage insulation stuff ? We see it a lot and we should incorporate that into a test where we're doing our standard opens and shorts test. Holden: Have people been requesting micro- ohm measurements when they have stacked vias? Kolmodin: at's the 4-wire Kelvin test that we do. e theory behind it is easy. You put a probe on two sides of a via and you measure it. e problem is when you've got stacked vias and sub parts; copper will give you a resistance per inch, like 9.81 ohms per inch or so, theo- retically. But we're dealing in micro- and milli- ohms for resistive values if it's a microvia stack. Holden: Are you seeing increasing require- ments for tighter TDR measurements? Some of the military guys, because of the new ICs, want TDR measurements within 2% of the window, rather than 10%. Kolmodin: Ten percent is standard for us, but we see it down to the 5% range at times. Even the standard 10% is not really sufficient. We see some of the big OEMs come down to 5% tolerances. For us, it's not a big thing. e machines can do it, but the real challenge is at the manufacturer. For example, the military