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90 PCB007 MAGAZINE I JANUARY 2022 and this will continue over time down to under 1/1 microns by 2030. PCB007 References 1. "Fine Lines in High Yield: Process and Material Adaptions for HDI," by Karl Dietz, CircuiTree Maga- zine, December 2000. 2. "Fine Lines in High Yield: Circuitizing Require- ments Driven by Packaging Designs," by Karl Dietz, CircuiTree Magazine, February 2001. 3. "Fine Lines in High Yield: Semi-additive and Modified Semi-additive Processes for µBGAs and other Fine Line Interconnect Substrates," by Karl Dietz, CircuiTree Magazine, December 2001. 4. "Fine Lines in High Yield: Fighting the Etch Factor and Etch Non-uniformity," by Karl Dietz, CircuiTree Magazine, July 2002. 5. "Fine Lines in High Yield: Line and Space Res- olution and Copper Etch Depth," by Karl Dietz, The PCB Magazine, September 2010. 6. IEEE Heterogeneous Roadmap, by Paul Wesling, The Heterogeneous Integration Roadmap: Enabling Technology for Systems of the Future, SMT Pan Pacific Conference, Hawaii, January 2020. 7. "Integrated Metallization System for High Density Interconnects and Modified Semi Additive Processing," Feng, K.; Spencer, T.; Watkowski, J., October 2013. 8. "Vertical Conductive Structures," by Happy Holden, PCB007 Magazine, October 2021. 9. YOLE Development Report, Status of the Advanced Packaging Industry 2018. Happy Holden has worked in printed circuit technology since 1970 with Hewlett-Pack- ard, NanYa Westwood, Merix, Fox- conn, and Gentex. He is currently a contributing technical editor with I-Connect007, and the author of Automation and Advanced Procedures in PCB Fabrication, and 24 Essential Skills for Engineers. To contact Holden or read past columns, click here. Figure 5: The trade-offs between dielectric thicknesses and trace/space geometries for heterogeneous integration is the overlapping technologies of PCBs, IC substrates, ultra-HDI, WLP/PLP and wafer interposers—back-end of the line (BEOL). (Source: YOLE Development 9 )