Issue link: https://iconnect007.uberflip.com/i/1481368
24 DESIGN007 MAGAZINE I OCTOBER 2022 Now, as a designer, I need to have some numbers. Plus, I have a lot of questions, as should you. On the following Q&A, you will find some questions that I ask at the beginning of each A-SAP or mSAP design. Q: Do I need to do anything different with my output files to the fabricator to support this? A: No. Fabricators use additive and subtractive processes all the time. You just need to know if they have the chemistry and experience work- ing with mSAP and A-SAP processes. Q: Do I need to have a special layer for SAP processes? A: No. ese processes can be constructed on outside and inside layers. Keeping them "balanced" (per good design practices) will certainly help keep costs down. Q: Can I mix thicker traces with these thinner traces on the same layer? A: Yes, but spacing is important here. It's a good idea to group these as much as possible to support the processes. Design rules are also very important. Q: How will this affect my impedance values? A: Fine traces affect impedance, but not as much as you might think. Eric Bogatin, Chaithra Suresh, Melinda Piket-May of the University of Colorado Boulder, and Haris Basit and Paul Dennig of Averatek have published a white paper 2 on the effects of using fine-line traces in HDI boards. ey explain it much better than I can, and I trust their analysis. Q: Do I need to teardrop all pad entries? A: Basically, I just have to route my designs as I normally would and consider the geometry stresses of using smaller traces as they go into solderable areas. Either teardrop or increase the trace size as it goes into a pad. Read all you can about A-SAP and mSAP, and don't look back. Companies like Averatek have experts on hand, including Haris Basit, who will be speaking at the IPC Advanced Packaging Symposium in Washington, D.C., Oct. 11–12. Knowledge is power. DESIGN007 References 1. "SAP Utilizing Very Uniform Ultrathin Copper," by Steve Iketani and Mike Vinson, PCB007 Maga- zine, August 2019. 2. "Utilizing Fine Line PCBs with High Density BGAs," by Eric Bogatin, et al, Signal Integrity Journal, January 2022. Cherie Litson, MIT/CID, CID+, is the founder of Litson1 Consulting and a master instructor at EPTAC.