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62 DESIGN007 MAGAZINE I NOVEMBER 2022 Many studies have shown that the failures seem to be initiated at the interface of the microvia target pad and the plated microvia interface—a plain "butt joint." As the elevated temperature of lead-free assembly reflow is employed, the stress on this joint exceeds what it can accommodate, unlike tin-lead reflow that occurs at a lower temperature. What caught us unprepared is that aer reflowing, the joint appears to be okay and will pass other performance testing, waiting until it fails in the field. is explanation seems to be validated by research that iMEC in Europe has conducted for the European Space Agency. eir finite element analysis of the microvia structure shows the maximum stress at this location and the stress increases as you stack the microvias and increase the temperature. But the high point of the paper and presen- tation is a new way to do stackup validation and predictive pre-production simulation of reliability. Gerry explains that there has never been a method to simulate a PCB design vali- dating that the material selection, dielectric thickness, microvia size, and configuration (single, stacked, or staggered microvias) could survive 6x reflows. But, as with the evolution of electrical test and the use of soware to vali- date design and final test, we now have so- ware that will validate the structural integrity of microvias during PCB stackup—before a design has been approved and placed into the fabrication process. Gerry explains how Avishtech's Gauss Stack simulation soware can provide the industry a way to validate and fabricate a microvia design with confidence and validate that the PCB has met the structural requirements by testing to IPC-TM-650 2.6.27. In this paper, he demon- strates real cases where this soware has iden- tified structural issues with a microvia design and how this soware can provide modifica- tion of the PCB design geometries that will result in a working stackup. Gerry walks us through how the soware considers the Z-axis CTE of laminate materials. He provides examples of stackups that appear to be fine but would fail in lead-free reflow or soon aer. Gerry contends, "With predictive engineering and reliability simulation, it is now possible to screen out an unreliable stackup and change to a material type that allows design geometries to pass the required reflow test requirements. It is also possible, through simu- lation, to determine that the microvia design must be modified by increasing the microvia diameter, staggering the microvias or changing the prepreg selection." Summary To conclude his paper, Gerry reiterates some of the advantages of utilizing reliability simulation at the beginning of the design cycle, including designing in reliability, reducing the number of redesigns and marginal designs, and creating design attributes that are "based on science and not tribal knowledge." If you're a designer or fabricator dealing with microvia failures and reliability, you're in luck. Gerry will be back at IPC APEX EXPO 2023 to present a new paper, "Microvia Reli- ability Stacking and Staggering for a Successful Design," during the Technical Conference. Gerry's abstract proposes to demonstrate how it is possible to use three or four stacked microvias, provided that the design considers the reliability influences of material expansion, pitch, microvia diameter, reflow temperature, and length of the stacked microvias. Stay tuned. I'll see you in January. DESIGN007 Happy Holden has worked in printed circuit technology since 1970 with Hewlett- Packard, NanYa Westwood, Merix, Foxconn, and Gentex. He is currently a contributing technical editor and columnist with I-Connect007, and the author of Automation and Advanced Procedures in PCB Fabrication, and 24 Essential Skills for Engineers. To read past columns, click here.