Issue link: https://iconnect007.uberflip.com/i/1511130
14 DESIGN007 MAGAZINE I NOVEMBER 2023 On the board side, we tend to be over-con- strained and on the assembly side, we tend to be under-constrained, so we need to find a happy medium. One thing I see in assembly is that the board designer does not oen con- sider the mechanical side of the design. Assem- bly requires access for tools, and so on. Fortu- nately, IPC standards such as the 6012s cover both fab and assembly, if designers actually read them. Shaughnessy: I've heard SI engineers half- jokingly say that signals should be as dirty as they can be and still pass margin, because of all the over-constraining going on in high speed. Moyer: Well, yes. But unfortunately, there is a caveat to that. I agree about designing it just enough to pass margin. e problem is not the board designer; it's the silicon designers who keep shrinking silicon technology and silicon geometry. Now we have chips coming out with edge rates on the order of 100 picoseconds, or even faster. In order to achieve those kinds of square edges to pass the timing, even my digi- tal traces, I now have frequency content up into the gigahertz range, which is approaching RF geometry. I have to worry about insertion losses, emissivity, and susceptibility and all of these RF-level issues, which never used to be a thing. It's insane, and the board designer has zero control over it. Shaughnessy: Is there else anything you'd like to add? Moyer: Number one, learn the IPC standards, whether it's through taking classes or just get- ting hold of standards and reading them your- self. I teach some of these IPC classes (for a little shameless plug here). Also, talk to your fabricator. Don't be afraid to call your fabri- cator and have those kinds of technical dis- cussions: "Hey, I've got this challenge on my design. Do you have any suggestions?" Your fab might have some recommendations that you never thought about that could be imple- mented in a much more cost-effective manner than the way you're thinking about doing. I tell my students that all the time, "Your fabricator is your friend." Shaughnessy: This has been really good. Thanks for your time, Kris. Holden: Very interesting, Kris. Moyer: Always a pleasure, Happy. DESIGN007 Fueled by an AI-driven inventory stocking frenzy across the supply chain, TrendForce reveals that Q2 revenue for the top 10 global IC design power- houses soared to US $38.1 billion, marking a 12.5% quarterly increase. In this rising tide, NVIDIA seized the crown, officially dethroning Qualcomm as the world's premier IC design house, while the remain- der of the leaderboard remained stable. NVIDIA is reaping the rewards of a global trans- formation. Bolstered by the global demand from CSPs, internet behemoths, and enterprises div- ing into generative AI and large language models, NVIDIA's data center revenue skyrocketed by a whopping 105%. A deluge of shipments, including the likes of their advanced Hopper and Ampere architecture HGX systems and the high-performing InfinBand, played a pivotal role. AMD's Q2 performance plateaued at about $5.36 billion, weighed down by a slump in gam- ing GPU sales and its embedded segment opera- tions. Conversely, MediaTek, after several quarters of inventory recalibration, witnessed a resurgence with components like TV SoCs and Wi-Fi stabilizing. Peering into Q3, while inventory levels across companies paint a rosier picture than H1, a perva- sive end-user demand slump urges caution. How- ever, a silver lining emerges with CSPs, internet titans, and private firms flocking to generative AI and large language models. (Source: TrendForce) Q2 Revenue for Top 10 IC Houses Surges by 12.5%