Issue link: https://iconnect007.uberflip.com/i/1512857
40 DESIGN007 MAGAZINE I DECEMBER 2023 that PCB outlines are interfering with other parts? Now what? Rejection, return, rework, reshipping, and reinstall are profit-killers. Conversely, imagine a PCB manufacturer put in the position of meeting an incredibly tight tolerance of ±0.005" (0.13 mm) on a PCB design that is 36" (914.40 mm) long. Challeng- ing design constraints do not help a manufac- turer's PCBs to fall neatly off the assembly line. When overly complex design specification challenges a supplier's ability to interpret man- ufacturing capability, expensive inspection and quality assurance process phases need to be added, requiring the expertise of additional project stakeholders. I review hundreds of PCB designs, and I see many PCB designers wasting the valuable time of their PCB project stakeholder coun- terparts by misunderstanding or misusing the power of dimensioning and tolerancing tech- niques. PCB dimensioning and tolerancing is a language requiring a sender and a receiver. If there is a mismatch on a PCB fab drawing, failure soon follows. I see that many designers could use some help simplifying their under- standing of dimensioning and tolerancing as well as language skills to better convey the per- formance requirements of their PCB outlines. PCB outlines are usually defined by our mechanical engineering stakeholders who commonly provide the outline parameters in the formats of IDF, DXF, or STEP. Unless PCB designers are designing for a "snap fit" board edge requirement or must match a complex enclosure profile—perhaps meant to seal in some potting compound or reduce the leakage of photons in a bright LED display—most PCB design outlines are given ample clearance from other parts. In fact, I think we could get most PCB designers to agree that most PCB design edge surfaces worldwide interface with relatively vast amounts of air (or space in a vacuum). If we can agree, then what can we do to enhance our dimensioning and tolerancing language skills to lower process rejection rates or reduce time wasted inspect- ing for needlessly wide tolerance specification at PCB fabrication and assembly facilities? Consider these four tips: 1 Select a next assembly interface point such as a mounting hole for the design lay- out origin. Documenting the X0, Y0 origin is a simple way of establishing a locational datum point for the entire hole pattern which is pro- cessed in the beginning stages of manufactur- ing with minimal steps. A hole is a powerful datum feature to reference because it shows up on every single process layer. Figure 1: Image showing the origin X0, Y0. 2 Use X and Y dimensions to simply locate the PCB outline with a relative tolerance to the hole pattern. Remember, these two geo- metric features (the holes and outlines) are Figure 2: The X and Y locate the board outline with relative tolerance to the hole pattern.