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Design007-Dec2023

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32 DESIGN007 MAGAZINE I DECEMBER 2023 difficult with the addition of more and more plane layers on a multilayer PCB. A ground plane serves well as a signal return, provided the ground is continuous under the signal path. But even with a continuous return path, there may be enough voltage drop across the plane to generate a common mode voltage. If le unchecked, it may escape as electro- magnetic emissions via the signal or power/ ground conductors. Return path discontinui- ties have a huge impact on supply bounce of single-ended signals. Fortunately, differen- tial signaling dramatically reduces this effect. Serial interfaces also significantly reduce the number of interconnects, which is another advantage over the use of parallel buses for high-speed design. Small discontinuities, such as vias and non- uniform return paths on a bus, are becom- ing an important factor for the signal integ- rity and timing of high-speed systems. ese produce impedance discontinuities due to the local return inductance and capacitive changes. Impedance discontinuities create reflected noise, contribute to differential channel-to-channel noise, and may promote mode conversion. In the case of differential pairs, the transformation from differential- mode to common-mode typically takes place on bends and non-symmetrical routing near via and pin obstructions, but can also be caused by small changes in impedance due to return path issues. One must also understand the importance of referencing and how to control the return displacement current flow of a signal. Each signal layer should be adjacent to, and closely coupled to, a reference plane, which creates a clear, uninterrupted return path and elimi- nates broadside crosstalk. As the layer count increases, this concept becomes easier to implement but decisions regarding return cur- rent paths become more challenging. Although power planes can be used as refer- ence planes, ground is more effective as local stitching vias can be used for the return cur- rent transitions, rather than stitch- ing decoupling capacitors Figure 1: HFSS simulation of return paths. (Source: Ansys)

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