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Design007-Dec2023

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34 DESIGN007 MAGAZINE I DECEMBER 2023 points. In addition, some of the return current flows through the interplane capacitance to close the loop. To avoid these issues, there are fundamental rules to follow such as: • Never allow a high-speed signal to cross a gap or split in the plane. is creates a large return path loop area and tends to radiate. • Never route a high-speed signal near the edge of the reference plane. e fringing fields may wrap around the edge of the board and radiate. • Never place an IC over a split plane (with the exception of DAC/ADC). e IC substrate is like a miniature multilayer PCB and may rely on a solid plane placed beneath the IC to provide a continuous return path. • Each signal layer should be adjacent to, and closely coupled to, a reference plane, which creates a clear, uninterrupted return path and eliminates broadside crosstalk. • A ground via needs to be placed close to every layer transition to provide a clear path for the return current. Unfortunately, discontinuities can never be totally eliminated but we can take steps to significantly minimize the effects. As with PDN planning, it is all about inductance. If the return path loop area is increased in any way, then the inductance will also increase. Key Points • A logic schematic diagram masks detail crucial to the operation of unintentional signal pathways. • e PCB designer needs to be able to visu- alize the connectivity of the return current flow in order to avoid large loop areas. • e return displacement current takes the path of least inductance in the nearest plane(s). • Ground impedance is at the root of virtually all signal and power integrity problems; low ground impedance is mandatory for both. • A ground plane serves well as a signal return, provided the ground is continuous under the signal path. • Return path discontinuities have a huge impact on supply bounce of single-ended signals. • Small discontinuities, such as vias and non-uniform return paths on a bus, are becoming an important factor for the signal integrity and timing of high-speed systems. • One must also understand the importance of referencing and how to control the return displacement current flow of a signal. • As the stackup layer count increases, so does the number of possible combinations of the structure. • Discontinuities tend to divert the return current increasing the loop area, induc- tance, and delay. DESIGN007 Resources 1. Beyond Design: "The Dark Side-Return of the Signal," "Return Path Discontinuities," by Barry Olney. Barry Olney is managing director of In-Circuit Design Pty Ltd (iCD), Australia, a PCB design service bureau that specializes in board-level simulation. The company developed the iCD Design Integrity software incorporat- ing the iCD Stackup, PDN, and CPW Planner. The software can be downloaded at www.icd.com.au. To read past columns, click here.

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