Design007 Magazine

Design007-Dec2023

Issue link: https://iconnect007.uberflip.com/i/1512857

Contents of this Issue

Navigation

Page 56 of 75

DECEMBER 2023 I DESIGN007 MAGAZINE 57 Prepare a dimensionally accurate layout. Work oversize (i.e., 4:1) for clarity. With dra- ing accuracy of 0.010", the 1:1 should be 0.003" or less. Leave radii for bends or folds equal to 10 to 12 times the total circuit thickness. Use 10:1 layouts of close tolerance areas (i.e., conductor pin clusters) and reduce to lay- out scale. Make multiple copies of the master layout (1:1 scale) for subsequent finetuning of the layout. e metal most commonly used in flexible circuits is rolled annealed (RA) copper with greater than 99% purity. Other materials may be used for special applications. Copper thick- ness is usually specified by weight per square foot, but may also be specified in linear mea- surements. For example: 1 oz./ 2 = 0.0014" and 2 oz./ 2 = 0.0028". e resistance and current-carrying capac- ity of conductors are interrelated. Resistance of flat flexible conductors depends, as is the case of round wires, on cross-sectional area. Specify the final width and thickness by the desired current carrying capacity and voltage drop. Allow for adequate heat dissipation. Flat copper conductors will dissipate heat more rapidly than round wire. e thin dielectric film of a flexible circuit results in less heat build-up than conventional wire coatings. A range of 1-, 2-, or 3-ounce copper is typical. For 2-ounce copper, use 0.015" widths before etching for unspecified (or signal) conductors. Allow for etch loss contraction of flexible cir- cuit layer of 1 mil/side for 1-ounce copper and 2-mil/side for 2-ounce copper (Figure 2). Use 0.015" to 0.020" for conductor spacing unless the circuit requires tighter conductor packaging or uses components with high den- sity pin clusters. Spacing of 0.005" can be pro- duced with good artwork. To avoid conduc- tor stresses, don't lay them over each other at bend areas and don't put them on the bias in bend areas. Figure 3 shows some of the recommended methods of addressing components: • Right-angle address to multi-row rectangular connectors with single layer requiring conductors to pass between pins • Inverted, bilateral address to multi-row rectangular connectors • Inverted address to circular connectors with straight rows • Right-angle address to circular connectors with straight rows • Right-angle multilayer approach to a circular connector with radial rows Make pads as large as possible, at least twice the size of the hole for the component lead, to avoid manufacturing yield problems. If circuit densities force smaller pads, consider inter- nal vias for sequential layers. Allow 0.008" to 0.010" clearance between the maximum pin diameter and the minimum finished hole size. Design all pads with fillets and tiedown ears to protect against pads liing during compo- nent soldering (avoid potential shorts). e Figure 2: Etching loss allowances. Figure 3: Methods of addressing connectors and other components.

Articles in this issue

Archives of this issue

view archives of Design007 Magazine - Design007-Dec2023