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18 DESIGN007 MAGAZINE I JANUARY 2024 Planning for PCB Fabrication Printed circuit boards may be as simple as having a single- or double-copper layer or require a more complex multilayer construc- tion. e fabrication processes implemented will commonly use the same basic materi- als, but fabrication processing can differ a great deal from one manufacturer to another. Although many circuit board fabricators will use similar chemistries and process systems to build the board, there can be significant dif- ferences in how they manage and control their processes. ere are four primary material elements for PCB fabrication: 1. Substrate. e first and most important is the base substrate, usually made of woven glass-fiber reinforcement and epoxy. is material is used for the majority of circuit board applications because it provides a physically stable dielectric platform for both circuit interconnect and component mounting. 2. Copper layer. Depending on the substrate base material, this electrically conductive layer will be a copper foil laminated to one or both surfaces of the dielectric core. 3. Solder mask. Applied on the outer sur- faces aer circuit imaging and chemical etching, a polymer coating applied over the bare copper circuit features on the cir- cuit board surface. 4. Surface marking. Silkscreen and ink-jet printing (also known as legend or nomen- clature printing) is applied on the com- ponent side of the board to furnish the assembly part numbers, source identifica- tion, material content, and component reference. Circuit design engineers must also consider several governing criteria: minimizing unnec- essary complexity, specifying the most suit- able base materials, and applying proven cir- cuit design principles that will enable efficient assembly processing. e goal is to provide an end product that meets its intended perfor- mance criteria and furnishes reliable operation throughout its life cycle. Circuit Complexity Assessment When assessing printed circuit board design complexity, first consider the component area and board area ratio. While the less complex circuit may only be the single- or double-cop- per-layer circuit, the component area to circuit board surface area ratio may not be workable. Conductor routing follows component place- ment. Clearance protocols must be established in advance: the space separating via-hole lands, microvia lands and/or component attach- ment lands. Spacing provided between surface mount land pattern and hole lands is referred to as "channel width." e channel widths for routing active and array-configured semicon- ductors will be mathematically calculated using the terminal pitch (center-to-center distance) and the size of the land pattern. is provides the maximum number of conductors that can be routed between each channel (conductors per channel). e spacing separating the cir- cuit conductors must consider the established minimum electrical clearance required for fab- rication process variables, solder-mask surface adhesion, land pattern features, via-hole lands, and other fixed elements on the board. Narrow conductors routed in parallel may have a space equal to the conductors' width; however, wider current-carrying and ground conductors will probably require a significantly wider spacing between adjacent conductors. ree circuit routing complexity levels for the multilayer printed circuit board are compared in Table 1. e width of conductors that function as power and ground paths will increase to accom- modate the level of current flowing through them. e best guide for establishing conduc- tor width and copper thickness is detailed in IPC-2152, Standard for Determining Current- Carrying Capacity in Printed Board Design.