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92 PCB007 MAGAZINE I FEBRUARY 2024 3. Layout efficiency: e percentage of capac- ity from design rules and structure that a designer can deliver on the board. T h e s e t h r e e f a c t o r s determine how much wir- ing is available on the sub- strate to meet the wir- ing demand. e data is straightforward except for layout efficiency. Layout efficiency is a little used factor that expresses what percentage of wiring capacity can be used in the design. e equation for substrate capacity for each signal layer is below. e total substrate capacity is the sum of all the signal layers: Wc (Wiring Capacity) = E * t/g Where: E = Layout efficiency t = number of traces per grid area or distance between two via pads g = grid size or length between centers of via pads above Wiring Demand Vs. Substrate Capacity e key to meeting schedules and keeping manufacturing costs under control is layout performance metrics (substrate capacity/wir- ing demand). It's an understanding of an opti- mum design and keeping track of how close you get to it. Practice balancing the design equation and doing what-ifs. Try achieving a layout performance of from 1.05 to 1.15. Typi- cal layout efficiencies are shown in Table 1. More examples of wiring models can be found in Chapter 19 of the Printed Circuits Handbook, Sixth Edition, or Chapter 16 of the Seventh Edition. PCB007 References 1. "A Statistical Approach to Wiring Requirements," by G. Coors, P. Anderson, and L. Seward, Proceed- ings of International Electronics Packaging Society (IEPS), 1990, pp. 774–783. 2. Principles of Electronic Packaging, by D.P. Ser- aphim, R. Lasky, and C.Y. Li, McGraw-Hill, 1989, pp. 39–52. 3. "New Polymeric Multilayer and Packaging," by H. Ohdaira, K. Yoshida, and K. Sassoka, Proceed- ings of Printed Circuit World Conference V, Glasgow, Scotland, reprinted in Circuit World, Vol. 17, No. 12, January 1991. 4. "Placement and Average Interconnection Lengths of Computer Logic," by W. Donath, IEEE Transactions on Circuits and Systems, No. 4, 1979, pp. 272–277. 5. "How Big Should a Printed Circuit Board Be?" by S. Sutherland and D. Oestreicher, IEEE Transac- tions on Computers, Vol. C-22, No. 5, May 1973, pp. 537–542. 6. "Electronic System Packaging: The Search for Manufacturing the Optimum in a Sea of Constraints," by L. Moresco, IEEE Transactions on Components, Hybrids and Manufacturing Technology, Vol. 13, 1990, pp. 494–508. Happy Holden has worked in printed circuit technol- ogy since 1970 with Hewlett- Packard, NanYa Westwood, Merix, Foxconn, and Gen- tex. He is currently a contrib- uting technical editor with I-Connect007, and the author of Automation and Advanced Procedures in PCB Fabrication, and 24 Essential Skills for Engineers. To read past columns, click here.