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Design007-Jun2024

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36 DESIGN007 MAGAZINE I JUNE 2024 technology, like DDR3, include ODT on the data I/O pins. is feature is controlled by the ODT pin and consumes additional power when activated. e ODT and the output driver on DDR4 devices include additional mode register settings over the previous DRAM to increase system flexibility and optimize signal integrity. e ODT impedance can vary from 34-240 Ω in receive mode and 34-48 Ω in transmit mode in Figure 3. DDR4 signal-ended signals are nor- mally routed on 40 Ω transmission lines, so for short trace lengths, with one load a 40 Ω ODT is perfect. However, since the ODT and driver strength are soware-selectable, one can vali- date and tune the strength during the testing phase of development. In the above case, the trace impedance is 39.99 Ω, and with one load the signal requires a 4.99 Ω series termination resistor to match the driver to the load. However, if there is more than one load (memory device), then the driving signal will need to rise faster. Hence, it will require a slightly smaller value of the series resistor. I'm not aware of any current PCB design tool that can determine the driver source impedance and, hence, accurately calculate the required series terminator. is is nor- mally delegated to expensive simulation so- ware. So, in this case, having a field solver is of little use without the other half of the equa- tion. However, the iCD Termination Planner and field solver are delivered as part of iCD's Stackup Planner offering. Key Points • Characteristic impedance is independent of trace length. • When a transmission line is perfectly matched to the driver and load, the signals propagating electromagnetic (EM) energy are totally absorbed by the load. • Mismatched impedance causes signals to reflect back and forth along the lines, which causes ringing at the load. • If the propagation time and reflection from source to load are longer than the edge transition time, an electrically long trace will exist. • We typically dampen reflections in high- speed PCB design by using resistive ter- minations (series or parallel) to match the impedance of the line to the driver. • Reflections are caused by using a driver strength that is too high for the load. • Subtracting the source impedance from the trace characteristic impedance gives the required series terminator value. • Series terminations are used to balance the impedance, match the line, and minimize reflections, particularly on long traces. • e models' source impedance should be based on the I/V curves. • On-die terminations can be used with some memory devices to match the trans- mission line and dampen the reflections. • Having a field solver is of little use without the other half of the equation—a termina- tion planner. DESIGN007 Resources • Beyond Design: "Reflecting on Reflections," "Terminations," by Barry Olney Barry Olney is managing direc- tor of In-Circuit Design Pty Ltd (iCD), Australia, a PCB design service bureau that special- izes in board-level simulation. The company developed the iCD Design Integrity software incorporating the iCD Stackup, PDN, and CPW Planner. The software can be down- loaded at www.icd.com.au. To read past columns, click here.

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