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54 SMT007 MAGAZINE I AUGUST 2024 high-reliability applications with consider- ation of various environmental requirements for a number of NASA mission applications 7 . ere are significant thermal cycle (TC) test data in the range of -55°C and 125°C, or lower TC ranges, for commercial and even high- reliability applications, which is covered by IPC 9701 8 . However, thermal cycle test results under extreme cold and cryogenic conditions, rep- resentative of deep-space mission applica- tions, is rare. Tudryn et al. 9 , presented detailed thermal cycle evaluation for Martian envi- ronment including die attachment with wire bonds. Recently, Ghaffarian 10 and Ghaffarian et al 11 compared the low temperature thermal cycles, including -110°C to 20°C for SnPb sol- der assemblies. e test results covered surface mount technology (SMT) packages including column grid array (CGA) to hand-soldered plated through-hole (PTH) ceramic pin grid array (PGA) assemblies. At IPC APEX EXPO 2022, the effect of burn-in at two temperatures was presented for a numerous FPGA package presented for FPBGA assemblies under hot-biased ther- mal cycle in the range of -40°C and 105°C 12 . In the current research, the cold-biased ther- mal shock cycles over the temperature range of -105°C to +40°C were performed for SnPb sol- der joint FPBGA assemblies. e cold-biased cycle has the same overall ΔT of 145°C with reversing the high and low temperature dwells. Cycles-to-failures aer 3,000 with Weibull plots are compared for hot/cold-biased cycles for CTBGA228 since there were no failures of CABGA208 to 3,000 cycles. Optical micro- section with 3D X-ray failure analyses are also presented. Experimental Methods SnPb FPBGAs FPBGAs and PCBAs Several FPBGAs, LGAs, and resistor parts were considered for SnPb temperature assem- bly and thermal cycle reliability evaluation. e daisy-chains FPGAs were: 1. Very in Chip Array® ball grid array with 208 balls (CABGA208) 2. in core ball grid array with 228 balls (CTBGA228) 3. Very thin chip array with 360 balls (CVBGA360) Pitches were 0.8, 0.5, and 0.4 mm, respec- tively. e test vehicle was designed to accommo- date a number of daisy-chain FPBGAs and other components while providing experimen- tal flexibility. Each test PCB uses the FR-4 sub- strate material, allowing for easy data compar- isons, and is 0.91-inch thick. ere are 16 indi- vidual zones, each of which can be separated easily for analysis and which contains its own individual pads for probing electrical. Four- teen zones are dedicated for FPBGAs and and LGAs, with the remaining two allocated for smaller components. e test matrix included different solder balls and solder paste alloys, but this work eval- uated a subset of FPGAs with SbPb solder balls and reflowed using SnPb solder paste. Reflow was performed using a convection reflow oven with 10 heating and three cooling zones. For SnPb solder paste reflow, direct ramp to 206˚C at 0.75˚C/ and -1.4˚C/s cooling rate (Figure 1) were used. All assemblies were inspected via 2D X-ray to assess the quality of the solder joints prior to environmental exposures. e basic process flows used for test vehicle assembly and evaluation prior to testing were: 1. Solder paste printing (Eutectic SnPb) over the printed circuit board 2. Component placement 3. Solder reflow 4. Perform daisy-chain verification and 2D X-ray inspection 5. Select those specified for thermal cycling exposures Figure 2 shows a test PCBA covering vari- ous packaging styles on the right. On the le