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82 PCB007 MAGAZINE I AUGUST 2024 PCB design side as well as on the manufactur- ing side. Ultimately, design-based estimations of envi- ronmental impact should be incorporated into electronic design tools. is will allow the designer to assess the impact of design choices not only on performance, power, area and cost but also on environmental impact. A similar integration into CAM soware will enable the PCB manufacturer to report the environmental impact of the PCB per regulatory or customer requirements as a standard practice. PCB007 References 1. "Exploring the Viability of Probabilistic Under- specification to Streamline Life Cycle Assessment," by E. Olivettei, S. Patanavanich, and R. Kirchain, Environmental Science & Technology, pp. 5208- 5216. 2. "Printed Wiring Board Pollution Prevention and Control Technology: Analysis of Updated Survey Results," USEPA, 1998. 3. "Alternative Technologies for Making Holes Conductive: Cleaner Technologies for Printed Wir- ing Board Manufacturers," USEPA, 1998. 4. "Printed Wiring Board Surface Finishes: Cleaner Technologies Substitutes Assessment," USEPA, 2000. 5. "Comparability of Life Cycle Assessments: Modelling and Analyzing LCA Using Different Databases," M. Kalverkamp, and N. Karbe, Cascade Use in Technologies 2018, Oldenburg, Germany. Maarten Cauwe, Cmst, is R&D team leader, Flexible Microsystems for Health, imec, and Ghent University, Zwijnaarde, Belgium. Geert Willems is electronic design and manufacuturing forum at imec, Leuven, Belgium. Eddy Geerinckx works for ACB, Dendermonde, Belgium, (no image available). a bare minimum, the one-inch free zone, the maximum panel occupation for a panel size of 18" x 24" is 80%. e simplest way to calcu- late the actual panel occupation is to estimate the number of PCBs that fit the production panel based on the dimensions and shape of the PCB. Conclusions Obtaining good quality data for PCB man- ufacturing, applicable to various application areas, remains a challenge. In recent years, more datasets based on primary data have become available. Some of these datasets take into account PCB build-up parameters or dif- ferent types of surface finish, although in most cases this still results in static data records for a given configuration. Scaling the datasets by area or weight to represent, in the best case, similar PCB designs is difficult to avoid with this static approach. e proposed parametric LCI methodology applies the full set of PCB build-up parameters (layer count, layer thick- ness, number and size of vias) as well as mate- rial specifications (laminates, prepregs, sol- der mask, finish) as input parameters to per- form a design-specific calculated LCI. Process data is obtained through a simplified data col- lection form, tailored to what is readily avail- able from the PCB manufacturer. While this method might not achieve the highest accu- racy, it facilitates the incorporation of data from different PCB manufacturers and pro- duction sites. Fur ther mo del improvement s invo lve extending the data collection exercise to other PCB manufacturing sites from various appli- cation areas and adding PCB features not yet covered by the actual model, such as micro- vias. e goal is to build a comprehensive and sufficiently accurate parametric LCI model for PCB manufacturing. e first step was taken by defining a practical and accurate methodology that can be implemented on the