Issue link: https://iconnect007.uberflip.com/i/1526407
SEPTEMBER 2024 I DESIGN007 MAGAZINE 13 For that reason, wherever we go, it does resonate—not just within the technical com- munity, but also in the areas of advocacy and in some of the political ideas that we're seeing within various regions. It's really important that we have a conversation about the other areas of the ecosystem. When you think about the CHIPS funding that's occurred, you could argue $52 billion is a lot of money or not a lot of money. Regardless, there's been a lot of atten- tion, and there's a lot of action now going on inside of the first-level component packaging world to address this. In the advocacy world, we now have a vehicle to talk about this within the U.S., EU, and across Asia. Kris, where does this leave the designer? What do the designers need to know about silicon to systems? Kris Moyer: Devan hit a lot of great points about where the silicon system and packaging is being used. Beyond that, we can no longer teach design from the point of view of a sin- gle device. You're not just building just a pro- cessor board or video card. You now have to think about the entire system. As the silicon keeps shrinking, we keep getting these faster and faster edge rates. On our digital side, we're approaching the RF frequencies. We now have to start taking a holistic, sys- tem-level approach to the design of everything involved. It's no longer, "I just have a chip," but "How will the parasitics of that chip interact with my board? How will my board interact with my cabling? How will my cabling interact with my antennas?" We used to say, "I've just got one board, that's all I'm responsible for," and the systems would just work. It's no longer the case. From a design education point of view, we really have to focus on that entire system, from the silicon transis- tor level inside the chips and the impact those are having to the choices we must make in our board design. We must understand how the choices we make in our board design impact our interconnectivity to our subsystem-level interconnect and the system as a whole, all the way up to the product level, whether that's an airframe, satellite systems, cars, or high-per- formance computing. Even at the board level, it's not enough to just put a resistor or capacitor on the board. e parasitics in those devices are having an impact. How do we deal with that? How do we start looking at HDI and embedded devices? How will those help us overcome the induc- tive and capacitive challenges in our design? We must start taking a whole system-level approach to design and understanding every- thing that's happening; we can't focus on one piece of the design. Kris, you've mentioned before that shrinking silicon is throwing a monkey wrench into designing even simple boards. Moyer: Absolutely. I taught this in my PD course at IPC APEX EXPO this year. Now that we're in the single-digit nanometer process nodes, we've got sub-nanosecond edge rates, almost down to double-digit picoseconds. At 16 nanometers, Xilinx was doing 250-picosec- ond edge rates. Someone at Qualcomm told me several years ago that they were approach- " We must start taking a whole system-level approach to design and understanding everything that's happening... "