Issue link: https://iconnect007.uberflip.com/i/1527952
OCTOBER 2024 I PCB007 MAGAZINE 65 that level, you can copper fill that microvia and the component pads that have vias in them, and they will be flush so now you can solder to them. If you try to do that with a standard via-in-pad all the way through the board, then you have to plate multiple times, which causes issues. Andy: What about solder mask registration and building room for tolerances? Another area of concern is where you put the solder mask and the solder mask registration. I see this problem frequently in boards where people are trying to define pads, and in some cases, may be using a copper-defined pad (non- solder-mask-defined pad), and then other pads in that same device are solder mask-defined pads. at can cause issues with aligning the component. When you start looking at ultra- fine features, your mask concerns will be a lot different. You have traces that are 1 mil apart. Solder mask registration becomes much more of an issue. e industry says solder mask can register within ±2–3 mils. If you have a trace that's 1 mil away, you will expose that trace. e best practice is to define these pads with a mask definition rather than a copper-defined path. e terminology is SMD vs NSMD. As you get to increasingly smaller pads, you have to be concerned with solder mask thick- ness. ere's only so much solder you can put down on that small area and only so much space to where the component is. ose are some aspects that can catch you. Designing with the proper fab tolerances in mind is key. If you want to build a line that is 28 microns, you design it in as 28 microns in the data. With LMI technology, we don't compensate. at's the line we will produce. It will yield 28 microns, not 25 or 30, but 28. at's the beauty of the technology. It's all governed by your photoli- thography. You don't have to worry about your etch process because you're just using a very fast flash etch. It removes a very thin coating of electroless and, boom, you're there. at's a great thing about it. Andy: What about designing for signal integrity and controlled impedance? Impedance is always a challenge. If you have an impedance line, for example, and you're coming out of a BGA, how do they deal with that when you're coming out with maybe a sub-1-mil line, 15–19 microns? How does the designer deal with that impedance? Eric Bogatin has done some work, and his studies show that those route-outs that are very short really don't materially change those longer-run traces, so you can come out of a BGA and jump up to what your impedance line might be and not pay a huge penalty for that. I think we are also seeing more acceptance in that area. ere is less concern about run- ning with an ultra-thin dielectric to try to get an impedance line. You're seeing some differ- ent approaches now, and we can accommodate pretty much all of them. Nolan: When we start looking at new ways to manufacture printed circuit boards, increas- ingly, the issue of sustainability—how green the process is—comes up, and how it applies to operating efficiency and costs for the fabricator. How does sustainability fit with LMI? If you look at the process in and of itself, whether it's mSAP or SAP, you are doing a lot to etch copper. Etching copper in and of itself seems wasteful, but all the copper that's etched is being reused in some way, shape, or form. So, that is not a big issue for sustainability. Microsection of 25 µm features.