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Design007-Nov2024

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NOVEMBER 2024 I DESIGN007 MAGAZINE 31 a nearby aggressor signal is by increasing the spacing between the signals. 21. Reducing the dielectric height will also dramatically reduce crosstalk without impacting real estate. Signal Integrity 1. Impedance is the key factor that controls the stability of a design. It is the core issue of the signal integrity methodology. 2. To reduce power consumption, IC manufacturers have moved to lower core voltages and higher operating frequen- cies, which of course mean high current requirements and faster edge rates. Faster edge rates mean reflections and signal quality problems. 3. e impedance of the trace is extremely important, as any mismatch along the transmission path will result in a reduction in the quality of the signal and possibly radiation of noise. 4. All drivers whose trace length (in inches) is equal to or greater than the rise time (in ns) must have provision for termination. It is the rise time rather than the frequency that is of concern. 5. Couple the signal traces closely to the plane. A 3-mil thickness dielectric material reduces the crosstalk by approximately a quarter compared to the 6-mil given the same trace spacing. 6. e goal of PDN analysis is to maintain low AC impedance on the supply voltage planes—from DC to the maximum required frequency—including harmonics. 7. Clock signals should always have the lon- gest delay of the group as the data, address, control, and command signals need to settle down before the clock arrives at the chip sampling the bus. 8. Faster edge rates mean reflections and signal quality problems. Figure 6: Ringing signal (red) and matched signal (blue).

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