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22 DESIGN007 MAGAZINE I DECEMBER 2024 specifications and optimize performance. e inverse PCB stackup optimization process searches for design parameters that meet the system specifications while optimizing a user- defined figure of merits (FoM). In physics, an inverse problem involves estimating the unknown parameters in reverse through mea- surements. Similarly, this optimization scheme searches for valid stackup design parameters by obtaining information about the target perfor- mance measurements. is optimization pro- cess is then accelerated by applying a machine language-based surrogate model. Today, we essentially plan a stackup by examining the required target characteristic and differential impedance for each technol- ogy on each signal layer, then select the best fit from our dielectric materials library to meet our needs (Figure 1). e iCD Stackup Plan- ner, for instance, has a goal-seeking algorithm built into the stackup list view that automati- cally fine-tunes the parameters. Impedance goal-seeking algorithms help match trace width and clearance to achieve the desired characteristic or differential impedance. By entering the desired impedance value, mul- tiple passes of the field solver automatically hone the variables to obtain the desired target imped- ance. is approach helps refine the parameters. However, while it essentially provides a close approximation, it does not determine the stackup structure or the dielectric material. Alternatively, the inverse stackup optimiza- tion framework solves the PCB stackup opti- mization by incorporating a discrete domain hyper-parameter optimization (HPO), which searches for the best set of parameters in an optimization problem. HPO has been used to tune parameters in the design flow for very large-scale integration (VLSI) and field-pro- grammable gate arrays (FPGA). It can also be used to optimize the hyper-parameters for indi- vidual stages, such as component placement and via spans. Besides parameter tuning, HPO also helps address the analog device sizing problem. e automated analog sizing methods work on the inverse design problem. Given target speci- fications, automatic analog sizing treats design parameters, such as transistor width, as hyper- parameters (configurable variables) and applies HPO to find the solution. HPO can be applied to automate the stackup design to adjust the Figure 1: The goal-seeking algorithm solves the impedance for distinct technology rules within the same layer. (Source: iCD Stackup Planner) Figure 2: Overall process flow of ISOP framework.