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20 PCB007 MAGAZINE I DECEMBER 2024 Key Points to Remember Resistivity: Always use the appropriate resis- tivity value for copper, which can vary slightly depending on the specific plating process. Cross-sectional area: e area is calculated based on the diameter of the plated hole, not the drilled hole diameter, as the plating thick- ness will determine the actual conductive area. Example Calculation Scenario: A plated hole with a diameter of 0.02 inches and a PCB thickness of 0.06 inches (typical for a standard PCB). Copper resistivity: 1.7 x 10 -8 ohm-meters Steps • Calculate the cross-sectional area: A = π * (diameter/2) 2 A = π * (0.02 inches / 2) 2 A ≈ 0.000314 square inches Convert dimensions to meters (if necessary) 0.06 inches = 0.001524 meters • Calculate the resistance R = (ρ * L) / A R = (1.7 x 10 -8 ohm-meters * 0.001524 meters) / 0.000314 square inches R ≈ 0.00008 ohm Important Considerations Plating thickness: e calculated resistance will be significantly affected by the thickness of the copper plating within the hole. Aspect ratio: For holes with a high aspect ratio (large depth compared to diameter), plating uniformity can be an issue, potentially affecting the calculated resistance. Temperature: If operating at high temper- atures, the resistivity of copper will increase, leading to a higher resistance. When we have the values expected, we can import them to the test machine and perform the test. Here the values have been predeter- mined. Pass or fail will be the result of the measurement compared to the reference val- ues. e advantage here is that comparisons can be made across different lots. is method does not care about variations in plating from lot to lot. It becomes the referee of the plating process. is will also give a truer representa- tion of the barrel or bonds on the given PCB or panel. is method will gain popularity as the preferred method moving forward as it will be more accurate and reinforce better process controls on plating and etch lines. Effects of Resistance Change on the Lines or Barrels Now that we have learned about 4-Wire Kel- vin and what is involved in obtaining optimum results, why are we doing this? High speed circuits are reactive to changes in resistance. Traces or transmission lines are designed to provide a signal path with optimal resistance and impedance. When a signal is matched to the load, optimum performance is achieved. If there is a mismatch, the standing wave ratio (SWR) will rise, and more power will be reflected toward the source. Why is this bad? As microdevices shrink in size, so does their impedance on their outputs, which means they are more susceptible to damage on their internal gates if improper sig- nals are present. Higher SWR reflects power to the source, and this could result in damage to the fragile IC. is is why time domain reflec- tometry (TDR) is important. is is a mea- surement of transmission line impedance to validate that proper signal propagation will exist. Changes in resistance will affect TDR and characteristic impedance of the transmis- sion line. Today, with high-speed substrates and microdevices, changes in resistance have a large effect on the overall device performance. is is why we need to identify anomalies in copper thickness and plating in the early stages of the build. Knowing these values ensures the long-term success of these substrates when presented with harsh environments and diffi- cult duty cycles where serviceability is difficult if not impossible.