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SMT007-Apr2025

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DRAM Damage Due to X-ray Inspections Post-PCB Assembly 46 SMT007 MAGAZINE I APRIL 2025 Article by Saurabh Gupta, et al INTEL (Editor's note: is paper was originally published in the SMTA proceedings.) Concerns are increasingly being raised about the potential for X-ray inspection steps dur- ing manufacturing, such as post-SMT inspec- tions, to cause latent damage to semiconduc- tor components. Several publications 1-3 have stressed the need for users to be aware of the risks associated with X-ray exposure to com- ponents, even though the radiation levels involved typically do not cause immediate fail- ures. Defining the thresholds for any type of degradation, however, can be difficult. Users must take care to configure the inspection setup in a way that achieves the best possible imaging results while minimizing any risk of damage to the samples. Although latent dam- age is a possibility, it is expected to affect only a small percentage of samples, as the major- ity are likely to have enough tolerance in key or sensitive parameters to alleviate concerns about device failure. One of the most significant semiconductor devices being used nowadays is the Dynamic Random Access Memory (DRAM). One major use of the DRAM in the current pack- aging landscape is to have an on-package DRAM close to the CPU to improve the band- width and lower latency. Several studies have reported that the critical device parameters of DRAM are sensitive to X-ray irradiation.

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