Issue link: https://iconnect007.uberflip.com/i/1534120
APRIL 2025 I DESIGN007 MAGAZINE 17 of conductors should not be separated by an area greater than 0.20 mm (~0.008") and the individual conductor width should not exceed double the dielectric thickness between adja- cent signal layer and reference layer. High-frequency RF Signal Issues For very-high-frequency circuit applications, the conductor's surface smoothness is a major concern. To address this issue, the foil supplier companies are providing better surfaces and, to maximize copper-to-dielectric adhesion, have introduced oxide replacement bonding treatments that will provide a smoother sur- face when applied to inner-layer conductors prior to lamination. Signal Line Isolation Care must be taken to prevent unintended coupling between signal lines. Some examples of potential coupling and preventative mea- sures: RF transmission conductors should be kept as far apart as possible, and should not be routed in close proximity for extended dis- tances. Coupling between parallel microstrip lines will increase with decreasing separation and increasing parallel routing distance. Con- ductors that cross on separate layers should have a ground plane keeping them apart. Sig- nal conductors that will carry high power lev- els should be kept away from all other lines whenever possible. e grounded coplanar waveguide provides for excellent isolation between lines. It is impractical to achieve isola- tion better than approximately -45dB between RF conductors on small PCBs. High-speed Digital Signal Conductors ese conductors should be routed sepa- rately on a different layer than the RF signal lines to prevent coupling. Digital noise (from clocks, PLLs, etc.) can couple onto RF signal lines, and these can be modulated onto RF car- riers. Alternatively, in some cases, digital noise can be up/down-converted. Likewise, VCC/ Power interconnect should be routed on a ded- icated layer. Also, adequate decoupling/bypass capacitors should be provided at the main VCC distribution node, as well as at VCC branches. e choice of the bypass capacitances must be made based on the overall frequency response of the RF IC, and the expected frequency dis- tribution nature of any digital noise from clocks and PLLs. ese conductors should also be separated from any RF lines that will transmit large amounts of RF power. Ground Planes e recommended practice is to use a solid (continuous) ground plane on Layer 2, assum- ing Layer 1 is used for the RF components and transmission lines. For stripline and off- set stripline variations, a ground plane above and below the center conductor is required. ese planes must not be shared or assigned to signal or power nets, but must be uniquely allocated to ground. Partial ground planes on a layer, sometimes required by design con- straints, must underlie all RF components and transmission lines. Ground planes must not be broken under transmission line routing. Fur- thermore, ground vias between layers should be added liberally throughout the RF portion of the PCB. is helps prevent accrual of para- sitic ground inductance due to ground-current return paths. e vias also help to prevent cross-coupling from RF and other signal lines across the PCB. Special Consideration on Bias and Ground Layers e layers assigned to system bias (DC supply) and ground must be considered in terms of the return current for the components. e general guidance is to not have signals routed on layers between the bias layer and the ground layer. Power (Bias) Routing and Supply Decoupling If a component has several supply connec- tions, a common practice is to use a "star" configuration for the power-supply routes. A larger decoupling capacitor (tens of μFarads) is