Issue link: https://iconnect007.uberflip.com/i/1538540
72 PCB007 MAGAZINE I AUGUST 2025 Minimizing Small-via Defects for High-reliability PCBs by Michael Carano, C onsultant, Global Ele ctronics Asso ciation To quote the comedian Stephen Wright, "If at first you don't succeed, then skydiving is not for you." That can be the battle cry when you find that only small-diameter vias are exhibiting voids. Why are small holes more prone to voids than larger vias when processed through electroless copper? There are several reasons. There are several reasons for small hole voiding when considering only the electroless copper pro- cess. Massive voiding is visible in Figure 1. The fabri- cator did not have voiding issues with holes greater than 13 mils in diameter. However, smaller-diameter vias, as seen in Figure 1, were prone to coverage issues. The panel in Figure 1 is 0.153" thick with a 0.010" diameter via. This is not particularly an issue with today's advanced circuit board designs. Major causes of the defect include: • Hydrogen gas bubbles lodging in vias • Drill gouges in via • Protruding glass fibers • Excessive etchback • Drilling burrs • Drill debris • Insufficient fluid flow through vias (either in catalyst or electroless copper solution) • Poor rinsing after each chemical processing step • Insufficient micro-roughening of the resin • Poor catalyst adsorption • Solution surface tension: need to improve wetting of the hole wall with plating solution • Ineffective interaction between the catalyst and the electroless copper process—a pro- cess formulation issue Addressing the bullet points in bold, the need to build high-density, high-reliability PWBs with small diameter vias is driven by the PC designer concerned with increased functionality and a smaller footprint. Since SMT is the key manufacturing method for component mounting, designers are no longer lim- ited to the minimum via diameter for component insertion. Certainly, higher aspect ratio vias are more prone to voiding, as highlighted above. Essentially, one can reasonably assume that small hole voiding is largely attributed to insufficient fluid flow through the via and gas bubble entrapment during the deposition process provided that all other pro- cesses have been optimized to maximize hole coverage. Solution flow through a hole is typically induced, creating a pressure differ- ential across the through-hole. T RO U B L E I N YO U R TA N K F i g u re 1 : D a r k a re a s re p re s e nt vo i d s i n t h e v i a s . S i n g l e p a s s h i g h - b u i l d e l e ct ro l e s s c o p p e r fo r m u l at i o n . ▼