Issue link: https://iconnect007.uberflip.com/i/1541169
10 DESIGN007 MAGAZINE I NOVEMBER 2025 The effective decoupling radius 3 in which capac- itance can be utilized is calculated by Equation 2. Looking at this equation, we can conclude that the radius (r) decreases when either the switching edge becomes faster (tr decreases), or the dielectric con- stant of the medium increases. Where: r = radius in inches tr = rise/fall time of switching edge (ns) er = dielectric constant Experiment 1: PCB Area Larger Than Required Effective Area This first experiment will outline a situation where the available power plane area is larger than the effec- tive decoupling radius calculated in Equation 2. The stackup used for this experiment (Figure 1) is an eight-layer board with top and bottom layers, three ground planes, and three planes at different supply voltages (1.5, 1.8, and 3.3 V). The dielectric thickness between the power and ground planes is 3 mils (0.75 mm), a popular size. In Figure 2, a simple PCB is created using Hyper- Lynx with an area of 16 in 2 (4 in x 4 in), where U1.1 represents the VRM and U2.1 represents the cur- rent sink. The current sink is set up to draw 250 mA with rise/fall times equal to 250 ps. In this base- line case, both the current sink and VRM are con- nected to Layer 2 (VCC1_5) and referenced to all three GND layers. The small yellow circles repre- sent stitching vias used to connect all GND layers together. In Equation 3, the calculation of the effec- tive decoupling radius yields an area of 6.60 in 2 , which is smaller than the total PCB area (16 in 2 ). Using this effective area, we can calculate the effective capacitance as 2.13 nF (Equation 4). In this example, the capacitance is calculated based on a single VCC1_5 and GND plane pair (Layers 2 and 3), neglecting the holes from the stitching vias. The results of this baseline simulation are shown in Figure 3. The peak noise voltage is found to be 91.4 mV located at the current sink. Experiment 2: Further Increasing PCB Area The PCB is increased to 64 in² (8 in x 8 in) with all other factors remaining the same. The results of the simulation are shown in Figure 4 with a noise volt- age equal to 87.1 mV. It is easy to see that the addi- F i g u re 2 : T h e exa m p l e P C B w i t h o n e c u r re nt s i n k ( U 2 .1 ) a n d o n e V R M ( U 1 .1 ) . T h e s m a l l ye l l ow c i rc l e s re p re s e nt st i tc h i n g v i a s u s e d to c o n n e ct t h e d i f fe re nt g ro u n d l aye rs to g et h e r. ▼ F i g u re 1 : T h e b a s e l i n e st a c k u p fo r E x p e r i m e nt 1 . Powe r p l a n e p a i rs a re s p a c e d 3 m i l s a p a r t . ▼

