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FEBRUARY 2026 I I-CONNECT007 MAGAZINE 117 completed the process and didn't get the desired outcome. If we've under-etched, we can correct the issue and recover the panels. However, over- etching usually leaves us with scrap. The Second Strip in SES In the second strip of the SES process, the panels go through another chemical stripping process, with a nitric acid-based solution that aggressively attacks and dissolves the tin. Copper reacts with nitric acid, but if the board is not left in the solution too long, the copper will be relatively unscathed. If the tin is a conductor, why would we want to remove it? It's because tin has a propensity in elec- tronics to grow tin whiskers, dendritic growths that can cause failures over time. Leaving tin on the traces can wake a sleeping dragon and create issues with board function down the line. Tin or tin residue will also complicate the surface finish application. Additional Design Best Practices We're now near the finish line. To avoid design- related issues, consider these design tips. Prevent Photoresist From Hanging Onto Panel Though it is mostly the fabricator's responsibility to properly plate the panel and avoid over-plating, designers can help prevent this issue. Consider whether you are leaving enough space between the traces, how much copper is required inside the plated through-holes, and copper thickness on the surface. More copper increases the chances of over-plating and the dreaded mush- room cap. As a general rule, traces embedded through a ground plane are more difficult to strip and etch effectively. Avoid Spaces That Are Too Narrow Undercutting is the unwanted sideways etching of copper, removing it from beneath the protective resist layer. This can create a weakened, trapezoi- dal shape and affect signal integrity. Compensate for undercutting by utilizing an etch factor, mean- ing the traces on the film should be wider than the final required width. Double Check Design Rule Checks Don't rely solely on design rule checks (DRC) to call out potential issues. For example, many DRCs do not look for large gaps between traces, instead focusing on the traces that are too close together, an especially critical issue for UHDI board designs. When the DRC ignores large gaps between traces, it often results in problems with crosstalk and signal integrity. Double check the designs them- selves to ensure no large gaps between traces are present. Now we have a fully functioning circuit board and we're almost ready to move on to pre-assem- bly, but oxygen and copper are not the best of friends. We must protect our boards during the next phase of production: applying solder mask and silk screen. I-CONNECT007 Matt Stevenson is vice president and general manager of ASC Sunstone Circuits. To read past columns, click here. C O N N ECT T H E D OT S To learn more... Check out Episode 9 of I-Connect007's On the Line with… podcast where we discuss the SES process in greater detail. Read Matt's book, The Printed Circuit Designer's Guide to … Designing for Reality