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98 I-CONNECT007 MAGAZINE I AUGUST 2026 sate for damage like this, but surfaces of this kind are very difficult to activate with the palladium cata- lyst used in the electroless copper process. The drilling operation should be investigated immedi- ately, with attention to the following: • Drill bit condition: Review bit wear, number of hits, and the overall condition of the tool • Spindle feeds and speeds: Confirm that the drill is cutting cleanly through the stack rather than punching through it • Up-feed rate: Check whether a slow up-feed is contributing to torn glass bundles; it should typically be about twice the in-feed rate • Chip load: Evaluate chip load settings and test adjustments to improve hole quality • Stack height: Review the number of boards in the drill stack and consider reducing it to improve drilling quality Another example of a rough hole wall is shown in Figure 2. Figure 3 (p. 100) shows a section of a plated through-hole. Note the poor quality in the hole wall and its effect on the plating process again. Even with all the issues shown in Figure 3, this board somehow passed in-circuit testing. Note the severe nailheading and some evidence of wicking along the torn-out glass fibers. The desmear operation is another potential cause of PTH voids. The most effective desmear process available today is based on alkaline permanganate. In fact, the permanganate system is considered an industry standard. The use of alkaline permanga- nate for multilayer PCBs has had a dramatic effect on copper coverage and adhesion in the PTH. However, if not controlled, this process can be a major cause of voids. First, the process consists of four main chemical process steps: T RO U B L E I N YO U R TA N K Figure 2: Deep resin gouge leading to plating folds. Note the thinned-out electrolytic copper plating. This situation is quite dangerous.