Issue link: https://iconnect007.uberflip.com/i/239245
characteristics of epig deposits for fine-line applications continues (EN) film will be 5–6 µm as the conventional ENEPIG process, the space of the wiring line became 5 µm or less. This will indicate that there is the risk of short-circuit between the wiring lines. In order to prevent this problem, thin EN process or EN free process (EPIG) will be suggested. If using thin EN or EPIG process, it's possible to make the plating process time short. In addition, EPIG process may have the possibility for high-frequency devices and the solution for Ni allergy problem. On the other hand, CSP have mainly two kinds of the joining method with the substrate or IC chip, which are wire bonding joining between IC chip and the packaged and some type of solder joint. Therefore, for the plating it's necessary for EPIG process to focus on SJR, WBR and the pattern ability. In this paper, we studied these characteristics of EPIG deposits, compared with ENEPIG deposits. Experiment and Results The coupons used in this study consisted of a copper-clad laminated substrate which was copper plated to a thickness of 20 µm using an acid copper electroplating process. For SJR tests, the copper-plated substrate was coated with solder mask and imaged to form 0.25 mm di- Figure 1: Reflow profile. ameter solder ball pads. Furthermore, the substrate of the copper pattern with 15 µm space of the wiring line was used for evaluating of the pattern ability. Each substrate was plated with EPIG and ENEPIG by using plating chemicals commercially available from C. Uyemura & Co., Ltd. As the solder ball for the evaluation of SJR, 0.3 mm Φ of Sn-3.0Ag-0.5Cu (M705) 0.3 mm Φ of Sn-1.2Ag-0.5Cu-0.05Ni (LF35) were used. The reflow profile with the top temperature of 260°C was applied for mounting the solder ball as shown in Figure 1. SJR was measured by HSS test (Dage 4000HS/Dage) as shown in Table 3. The condition of heat treatment after mounting the solder ball was done for 300 hours at The target thicknesses were Pd = 0.05, 0.1, 0.2 µm and Au = 0.05, 0.1, 0.2, 0.3 µm The target thicknesses were Ni = 6 µm, Pd = 0.1 µm and Au = 0.05, 0.1, 0.2, 0.3 µm Table 1: The EPIG plating process. Table 2: The ENEPIG Plating Process. 14 The PCB Magazine • January 2014